T7507 Quad PCM Codec with Filters,
Termination Impedance, and Hybrid Balance
Data Sheet
August 1999
Timing Characteristics (continued)
TIME SLOT
tMCHMCL1
1
2
3
4
5
6
7
8
MCLK
tSPLMCL
tSPHMCL
FSEP
tDVMCL
tMCLDV
BIT
1
BIT
2
BIT
3
BIT
4
BIT
5
BIT
6
BIT
7
BIT
8
DR
DR
STABLE
5-3582.b(F)
Figure 14. T7507 Receive Timing, FSEP > 1 MCLK and IFS = 0, Delayed Timing (D3 = 0)
TIME
SLOTS
19 20 21 22 23 24 25 26 27 28 29 30 31
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20
FSEP
DX
X0
X1
X3
X2
DR
R2
R0
R1
R3
Programming:
00010111
00100101
01001111
01101000
CHANNEL 0 IN TIME SLOT 23
CHANNEL 1 IN TIME SLOT 5
CHANNEL 2 IN TIME SLOT 15
CHANNEL 3 IN TIME SLOT 8
5-4853(F)
Figure 15. Typical Frame Sync Timing (IFS = 0)
Lucent Technologies Inc.
27
AGERE [ AGERE SYSTEMS ]
