T8301 Internet Protocol Telephone
Phone-On-A-Chip
IP Solution DSP
Advance Data Sheet
December 2000
3 Overview
(continued)
STCK
STO1
STI1
SPKDRV1A
SPKDRV1B
SPKDRV2A
SPKDRV2B
AOUTA
AINCP
AINCN
12 dB
+
12 dB
1.5 dB
2.5 Vp-p
TONE RINGER
trc_reg
AUDIO
CODEC
BLOCK
aioc
act1
act2
DMA
OUTPUT DMAS
COUNTER
ADDRESS
OUTPUT DMAH
COUNTER
ADDRESS
INPUT DMA
COUNTER
ADDRESS
dmac reg
SOUT SRAM
BUFFER
512 x 16
AOUTA SRAM
BUFFER
512 x 16
AIN SRAM
BUFFER
512 x 16
D(15:0)
A(15:0)
RWN
I_CSN
M_CSN
X_CSN
+
30 dB
–
AINAN
TMODEN0
TMODEN1
TMODEN2
CKO
RESETN
STOPN
CLOCK/PLL
& POWER
PGA
0—21 dB
IN 3 dB
STEPS
AUDIO CLOCK
GENERATOR
aclkc
DMAINT
ADDRESS
DECODE
‘OR’
ERAMLO
INTERNAL
SRAM
16K x 16
CK8kHz
CK2MHz
CKI1
CKI2
TRSTN
TDO
TDI
TCK
TMS
ERAMHI
pllc
EROM
powerc
D[15:0]
A[15:0]
RWN
I/O
EXTERNAL MEMORY INTERFACE
mwait
ioc
JTAG
jtag
JCON
ID
BYPASS
Breakpoint
HDS
Trace
YDB
YAB
XAB
XDB
INSTRUCTION/
COEFFICIENT BUS
DPRAM
6K x 16
DSP1627
CORE
IROM
32K x 16
SIO
sdx(out)
srta
tdms
sdx(in)
IOLD
IOCK
SYNC
DO1
DI1
BMU
aa0
aa1
sioc
saddx
DATA BUS
I
N
T
E
R
R
U
P
T
INT1N
INT0N
TIMER
timerc
timer 0
OR
DSP 1600 CORE
ar0
ar1
ar2
ar3
BIO
sbit
cbit
BIO[3:0]
D-IDB
5-8210 (F)
Figure 3. T8301 Block Diagram
8
Lucent Technologies Inc.
AGERE [ AGERE SYSTEMS ]
