AS7C1026
AS7C31026
®
Read cycle (over the operating range)
-10
Parameter
Symbol
t
RC
t
AA
t
ACE
t
OE
t
OH
t
CLZ
t
CHZ
t
OLZ
t
BA
t
BLZ
t
BHZ
t
OHZ
t
PU
t
PD
Min
10
–
–
–
4
0
–
0
–
0
–
–
0
–
Max
–
10
10
5
–
–
6
–
5
–
5
5
–
10
Read cycle time
Address access time
Chip enable (CE) access time
Output enable (OE) access time
Output hold from address change
CE Low to output in low Z
CE High to output in high Z
OE Low to output in low Z
Byte select access time
Byte select Low to low Z
Byte select High to high Z
OE High to output in high Z
Power up time
Power down time
Shaded areas indicate preliminary information.
-12
Min
12
–
–
–
4
0
–
0
–
0
–
–
0
–
Max
–
12
12
5
–
–
6
–
6
–
6
6
–
12
15
–
–
–
4
0
–
0
–
0
–
–
0
–
-15
Min
Max
–
15
15
8
–
–
6
–
8
–
6
6
–
15
20
–
–
–
4
0
–
0
–
0
–
–
0
–
-20
Min
Max
–
20
20
10
–
–
8
–
10
–
8
8
–
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4,5
4,5
4, 5
4, 5
4, 5
5
4, 5
4, 5
4, 5
3
3
Notes
SRAM
Key to switching waveforms
Rising input
Falling input
Undefined output/don’t care
Read waveform 1 (address controlled)
t
RC
Address
Data
OUT
t
OH
Previous data valid
t
AA
Data valid
t
OH
Read waveform 2 (OE, CE, UB, LB controlled)
t
RC
Address
t
AA
OE
t
OLZ
CE
t
LZ
LB, UB
t
BLZ
Data
IN
t
BA
Data valid
t
BHZ
t
ACE
t
OHZ
t
HZ
t
OE
t
OH
4
ALLIANCE SEMICONDUCTOR
DID 11-20011-A. 5/22/00