AS7C32098A
®
Read waveform 2 (CE, OE, UB, LB controlled)
5,7,8
t
RC
Address
t
AA
OE
t
OE
t
OLZ
CE
t
ACE
t
CLZ
LB, UB
t
BA
t
BLZ
Data
OUT
Data valid
t
BHZ
t
CHZ
t
OHZ
t
OH
Write cycle (over the operating range)
9
–10
Parameter
Write cycle time
Chip enable (CE) to write end
Address setup to write end
Address setup time
Write pulse width (OE = High)
Write pulse width (OE = Low)
Write recovery time
Address hold from end of write
Data valid to write end
Data hold time
Write enable to output in High-Z
Output active from write end
Byte enable Low to write end
Symbol Min
t
WC
t
CW
t
AW
t
AS
t
WP1
t
WP2
t
WR
t
AH
t
DW
t
DH
t
WZ
t
OW
t
BW
10
7
7
0
7
10
0
0
5
0
0
3
7
Max
–
–
–
–
–
–
–
–
–
–
5
–
–
12
8
8
0
8
12
0
0
6
0
0
3
8
–
6
–
–
–12
Min
Max
–
–
–
–
–
–
–
–
Min
15
10
10
0
10
15
0
0
7
0
0
3
10
–15
Max
–
–
–
–
–
–
–
–
–
–
7
–
–
Min
20
12
12
0
12
20
0
0
9
0
0
3
12
–20
Max
–
–
–
–
–
–
–
–
–
–
9
–
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3,4
3,4
3,4
3,4
Note
2/24/05,v. 1.0
Alliance Semiconductor
P. 5 of 10
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
