440GP – Power PC 440GP Embedded Processor
Revision 1.07 – October 4, 2007
Data Sheet
Signal Lists
The following table lists all the external signals in alphabetical order and shows the ball (pin) number on which the
signal appears. Multiplexed signals are shown with the default signal (following reset)
not
in brackets and the
alternate signal in brackets. Multiplexed signals appear alphabetically multiple times in the list—once for each
signal name on the ball. The page number listed gives the page in “Signal Functional Description” on page 48
where the signals in the indicated interface group begin. In cases where signals in the same interface group (for
example, Ethernet) have different names to distinguish variations in the mode of operation, the names are
separated by a comma with the primary name appearing first. These signals are listed only once, and appear
alphabetically by the primary name.
Signals Listed Alphabetically
Signal Name
AGND
AGND
AGND
AMV
DD
APV
DD
ASV
DD
BA0
BA1
BankSel0
BankSel1
BankSel2
BankSel3
[BE0]PCIXC0
[BE1]PCIXC1
[BE2]PCIXC2
[BE3]PCIXC3
[BE4]PCIXC4
[BE5]PCIXC5
[BE6]PCIXC6
[BE7]PCIXC7
BusReq
CAS
ClkEn0
ClkEn1
ClkEn2
ClkEn3
(Sheet 1 of 22)
Ball
J01
J24
AA11
AB11
G01
G24
AA16
DDR SDRAM
AD09
AB15
W14
DDR SDRAM
AD11
AD05
F14
E16
C19
F20
PCI-X
C08
C03
G09
F09
AA24
AB05
AD17
AB10
DDR SDRAM
Y09
W09
External Master Peripheral
DDR SDRAM
Power—MemClkOut PLL analog voltage
Power—PCI-X PLL analog voltage
Power—SysClk PLL analog voltage
Power—Analog ground
Interface Group
Page
18
AMCC