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PPC440GP-3RC500CZ 参数 Datasheet PDF下载

PPC440GP-3RC500CZ图片预览
型号: PPC440GP-3RC500CZ
PDF下载: 下载PDF文件 查看货源
内容描述: 的Power PC 440GP嵌入式处理器 [Power PC 440GP Embedded Processor]
分类和应用: 微控制器和处理器外围集成电路微处理器PC时钟
文件页数/大小: 83 页 / 1393 K
品牌: AMCC [ APPLIED MICRO CIRCUITS CORPORATION ]
 浏览型号PPC440GP-3RC500CZ的Datasheet PDF文件第55页浏览型号PPC440GP-3RC500CZ的Datasheet PDF文件第56页浏览型号PPC440GP-3RC500CZ的Datasheet PDF文件第57页浏览型号PPC440GP-3RC500CZ的Datasheet PDF文件第58页浏览型号PPC440GP-3RC500CZ的Datasheet PDF文件第60页浏览型号PPC440GP-3RC500CZ的Datasheet PDF文件第61页浏览型号PPC440GP-3RC500CZ的Datasheet PDF文件第62页浏览型号PPC440GP-3RC500CZ的Datasheet PDF文件第63页  
Revision 1.07 – October 4, 2007
440GP – Power PC 440GP Embedded Processor
Data Sheet
Recommended DC Operating Conditions
(Continued)
Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended
conditions can affect device reliability.
Parameter
Case Temperature rating for C package
Case Temperature rating E for C package
Case Temperature rating E for F package
Notes:
Symbol
T
C
T
C
T
C
Minimum
-40
-40
-40
Typical
Maximum
+85
+105
+100
Unit
°C
°C
°C
Notes
6
6
6
1. PCI-X drivers meet PCI-X specifications.
2. SV
REF
= SV
DD
/2
3. The analog voltages used for the on-chip PLLs can be derived from the logic voltage, but must be filtered before entering the
PPC440GP. See “Absolute Maximum Ratings” on page 55.
4. During chip power-up, OV
DD
should begin to ramp before V
DD
. External voltage should not be applied to the chip I/O pins before
OV
DD
is applied to the chip. A power-down cycle should complete (OV
DD
and V
DD
should both be below 0.4V) before a new power-
up cycle is started.
5. LPDL is least positive down level; MPUL is most positive up level.
6. Case temperature, T
C
, is measured at top center of case surface with device soldered to circuit board.
Input Capacitance
Parameter
Group 1 (2.5V SSTL I/O)
Group 2 (5V tolerant LVTTL I/O)
Group 3 (PCI-X I/O)
Group 4 (Receivers)
Symbol
C
IN1
C
IN2
C
IN3
C
IN4
Maximum
12
12
12
9
Unit
pF
pF
pF
pF
Notes
DC Power Supply Loads
Parameter
V
DD
(1.8V) active operating current
OV
DD
(3.3V) active operating current
SV
DD
(2.5V) active operating current
AxV
DD
(1.8 V) input current
Symbol
I
DD
I
ODD
I
SDD
I
ADD
Minimum
Typical
915
125
560
33
Maximum
Unit
mA
mA
mA
mA
Notes
2
2
2
1, 2
Notes:
1. See “Absolute Maximum Ratings” on page 55 for filter recommendations.
2. The current values listed above are not guaranteed to be the highest obtainable. These values are dependent on many factors including
the type of applications running, clock rates, use of internal functional capabilities, external interface usage, case temperature, and the
power supply voltages. Your specific application can produce significantly different results. V
DD
(logic) current and power are primarily
dependent on the applications running and the use of internal chip functions (DMA, PCI, Ethernet, and so on). OV
DD
(I/O) current and
power are primarily dependent on the capacitive loading, frequency, and utilization of the external buses.
AMCC
59