The interrupt controller block is functionally compatible
with the standard cascaded 8259A controller pair as
implemented in the PC/AT system. The master control-
ler drives the CPU’s interrupt input signal based on the
highest priority interrupt request pending at the master
controller’s IRQ7–IRQ0 inputs. The master IRQ2 input
is configured for Cascade mode and is driven only by
the slave controller’s interrupt output signal. The high-
est pending interrupt at the slave’s IRQ inputs will
therefore drive the IRQ2 input of the master.
The interrupt controller has programmable sources for
interrupts that are controlled through extended config-
uration registers and, on the ÉlanSC400 microcontrol-
ler, through PC Card controller configuration registers.
Programmable Interval Timer (PIT)
The programmable interval timer (PIT) on the
ÉlanSC400 and ÉlanSC410 microcontrollers is soft-
ware-compatible with PC/AT 8254 system timers. The
PIT provides three 16-bit counters that can be operated
independently in six different modes. The PIT is gener-
ally used for timing external events, counting, and pro-
duc ing repetitive waveforms. The PIT c an be
programmed to count in binary or in BCD.
Real-Time Clock (RTC)
T h e RT C d e s i g n e d i n t o t h e É l a n S C 4 0 0 a n d
ÉlanSC410 microcontrollers is compatible with the
MC146818A device used in PC/AT systems. The RTC
consists of a time-of-day clock with alarm interrupt and
a 100-year calendar. The clock/calendar has a pro-
grammable periodic interrupt, 114 bytes of static user
RAM, and can be represented in either binary or BCD.
The RTC includes the following features:
s
Counts seconds, minutes, and hours of the day
s
Counts days of the week, date, month, and year
s
12–24 hour clock with AM and PM indication in
12-hour mode
s
14 clock, status, and control registers
s
114 bytes of general-purpose RAM
s
Three separately software-maskable and testable
interrupts
– Time-of-day alarm is programmable to occur
from once-per-second to once-per-day
– Periodic interrupts can be continued to occur at
rates from 122
µs
to 500 ms
– Update-ended interrupt provides cycle status
s
Dedicated power pin directly supports lithium
backup battery when the rest of the chip is com-
pletely powered down (RTC-only mode)
s
Voltage monitor circuit checks the voltage level of
the lithium backup battery and sets a bit when the
battery is below specification.
s
Internal RTC reset signal performs a reset when
power is applied to the RTC core.
PC/AT Support Features
The ÉlanSC400 and ÉlanSC410 microcontrollers
provide all of the support functions found in the original
IBM PC/AT. These include the Port B status and control
bits, speaker control, CPU-core reset based on the
system control processor (SCP), and A20 gate control,
as well as extensions for fast CPU core reset. In
addition, a CPU shutdown cycle (e.g., as a result of a
triple fault) generates a CPU core reset.
Bidirectional Enhanced Parallel Port (EPP)
The parallel port on the ÉlanSC400 and ÉlanSC410
microcontrollers is functionally compatible with IBM
PC/AT and PS/2 systems, with an added EPP mode for
faster transfers. The microcontroller’s parallel port in-
terface provides all the status inputs, control outputs,
and the control signals necessary for the external par-
allel port data buffers.
The parallel port interface on both microcontrollers is
shared with some of the GPIO signals and, on the
ÉlanSC400 microcontroller, with the second PC Card
socket interface. Only one of these interfaces can be
enabled at one time.
The parallel port interface can be configured to operate
in one of three different modes of operation:
s
PC/AT Compatible mode:
This mode provides a
byte-wide forward (host-to-peripheral) channel with
data and status lines used according to their original
(Centronics) definitions in the IBM PC/AT.
s
Bidirectional mode:
This mode offers byte-wide bi-
directional parallel data transfers between host and
peripheral, equivalent to the parallel interface on the
IBM PS/2.
s
Enhanced Parallel Port (EPP) mode:
This mode
provides a byte-wide bidirectional channel con-
trolled by the microcontroller. It provides separate
address and data cycles over the eight data lines of
the interface with an automatic address and data
strobe for the address and data cycles, respectively.
EPP mode offers wider system bandwidth and in-
creased performance over both the PC/AT Compat-
ible and Bidirectional modes.
16
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
AMD [ ADVANCED MICRO DEVICES ]
