A617308 Series
Timing Waveforms (continued)
Read Cycle 4(1, 4, 7, 8)
CE2
tACE
5
tCLZ
5
tCHZ
DOUT
Notes: 1.
is high for Read Cycle.
WE
2. Device is continuously enabled,
= VIL and CE2= VIH
CE1
3. Address valid prior to or coincident with
transition low.
CE1
4. OE = VIL.
5. Transition is measured ±200mV from steady state. This parameter is sampled and not 100% tested.
6. CE2 is high.
7.
is low.
CE1
8. Address valid prior to or coincident with CE2 transition high.
Write Cycle 1(6)
(Write Enable Controlled)
tWC
Address
3
tAW
tWR
5
tCW
(4)
(4)
CE1
CE2
1
2
tAS
tWP
WE
tDW
tDH
DIN
7
tWHZ
7
tOW
DOUT
PRELIMINARY
(January, 2000, Version 0.2)
7
AMIC Technology, Inc.
AMICC [ AMIC TECHNOLOGY ]
