3.15V
VL
Standard
Load
Thevenin
Equivalent
R1
R2
RL
Output
Output
CL
CL
Figure 8 - PEEL™ Device and Array Test Loads
Technology
R1
R2
RL
VL
CL
CMOS
TTL
1.275V
1.840V
33 pF
33 pF
284 kΩ
308 Ω
258 kΩ
433 Ω
113 kΩ
180 Ω
Ordering Information
Part Number
Speed
Temperature
Package
PEEL18LV8ZP-25 (L)
PEEL18LV8ZPI-35 (L)
PEEL18LV8ZJ-25 (L)
PEEL18LV8ZJI-35 (L)
PEEL18LV8ZS-25 (L)
PEEL18LV8ZSI-35 (L)
PEEL18LV8ZT-25 (L)
PEEL18LV8ZTI-35 (L)
25ns
35ns
25ns
35ns
25ns
35ns
25ns
35ns
Commercial
Industrial
20-pin Plastic DIP
20-pin Plastic DIP
20-pin PLCC
Commercial
Industrial
20-pin PLCC
Commercial
Industrial
20-pin SOIC
20-pin SOIC
Commercial
Industrial
20-pin TSSOP
20-pin TSSOP
Part Number
Device
Suffix
PEELTM18LV8Z PI-35X
Lead Free
L : Lead Free Package
Blank : Normal
Package
P = 20-pin Plastic 300 mil DIP
Speed
J = 20-pin Plastic (J) Leaded Chip Carrier (PLCC)
S = 20-pin SOIC 300 mil Gullwing
T = 20-pin TSSOP 170mil
-25 = 25ns tpd
-35 = 35ns tpd
Temperature Range
(Blank) = Commercial 0 to 70oC
I = Industrial -40 to 85oC
Anachip Corp.
www.anachip.com.tw
Rev. 1.0 Dec 16, 2004
9/10
ANACHIP [ ANACHIP CORP ]
