FLASH
AS8F128K32
Austin Semiconductor, Inc.
AC CHARACTERISTICS
SYMBOL
PARAMETER
JEDEC Standard
TEST SETUP
-60 -70 -90 -120 -150 UNIT
Read-Only Operations
1
t
t
Min 60 70 90 120 150 ns
Max 60 70 90 120 150 ns
Max 60 70 90 120 150 ns
Read Cycle Time
AVAV
RC
CEx\ = V
IL
Address to Output Delay
t
t
ACC
AVQV
OE\ = V
IL
Chip Enable to Output Delay
Output Enable to Output Delay
t
t
ELQV
GLQV
EHQZ
CE
t
t
t
t
Max 30 35 40 50 55
Max 20 20 25 30 35
Max 20 20 25 30 35
ns
ns
ns
ns
OE
1,2
t
Chip Enable to Output High Z
DF
DF
1,2
t
Output Enable to Output High Z
GHQZ
0
Read
Min
Min
1
t
Output Enable Hold Time
OEH
Toggle and
Data Polling
10
ns
ns
Output Hold Time From Addresses
CEx\ or OE\, Whichever Comes First
Erase and Program Operations
0
t
t
Min
AXQX
OH
1
t
t
Min 60 70 90 120 150 ns
Write Cycle Time
AVAV
AVWL
WLAX
WC
0
Address Setup Time
Address Hold Time
Data Setup Time
Data Hold Time
t
t
t
Min
ns
ns
ns
ns
AS
AH
DS
DH
t
Min 45 45 45 50 50
Min 30 30 45 50 50
t
t
t
DVWH
WHDX
0
0
t
Min
Min
Read Recover Time Before Write
(OE\ High to WEx\ Low)
t
t
ns
GHWL
GHWL
0
0
CEx\ Setup Time
CEx\ Hold Time
t
t
t
Min
Min
ns
ns
ELWL
WHEH
WLWH
WHWL
CS
t
CH
Write Pulse Width
Write Pulse Width High
t
t
t
Min 30 35 45 50 50
ns
WP
20
14
1.0
50
t
Min
TYP
TYP
Min
ns
WPH
4
t
t
t
t
µs
sec
µs
Byte Programming Operation
WHWH1
WHWH2
WHWH1
WHWH2
4
Sector Erase Operation
1
t
V
Setup Time
VCS
CC
NOTES:
1. Not 100% tested.
2. Output Driver Disable Time.
3. See Figure 7 and Table 6 for test specifications.
4. See the “Erase and Programming Performance” section for more information.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8F128K32
Rev. 2.0 5/03
13