FLASH
AS8F128K32
Austin Semiconductor, Inc.
FIGURE 10: Chip/Sector Erase Operations Timings
2AAh
NOTE: SA = sector address (for Sector Erase), VA = Valid Address for reading status data (see “Write Operation Status”).
FIGURE 11: Data\ Polling Timings (During Embedded Algorithms)
NOTES: VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle.
*applies to every 8th byte.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8F128K32
Rev. 2.0 5/03
15