欢迎访问ic37.com |
会员登录 免费注册
发布采购

PCM3001E 参数 Datasheet PDF下载

PCM3001E图片预览
型号: PCM3001E
PDF下载: 下载PDF文件 查看货源
内容描述: 立体声音频编解码器18位,串行接口TM [Stereo Audio CODEC 18-BITS, SERIAL INTERFACE TM]
分类和应用: 解码器编解码器消费电路商用集成电路光电二极管
文件页数/大小: 21 页 / 213 K
品牌: BURR-BROWN [ BURR-BROWN CORPORATION ]
 浏览型号PCM3001E的Datasheet PDF文件第8页浏览型号PCM3001E的Datasheet PDF文件第9页浏览型号PCM3001E的Datasheet PDF文件第10页浏览型号PCM3001E的Datasheet PDF文件第11页浏览型号PCM3001E的Datasheet PDF文件第13页浏览型号PCM3001E的Datasheet PDF文件第14页浏览型号PCM3001E的Datasheet PDF文件第15页浏览型号PCM3001E的Datasheet PDF文件第16页  
t
LRP
LRCIN
t
BL
t
BCH
t
BCL
t
LB
1.4V
BCKIN
t
BCY
1.4V
t
DIS
t
DIH
1.4V
DIN
t
BDO
DOUT
t
LDO
0.5 x V
DD
BCKIN Pulse Cycle Time
BCKIN Pulse Width High
BCKIN Pulse Width Low
BCKIN Rising Edge to LRCIN Edge
LRCIN Edge to BCKIN Rising Edge
LRCIN Pulse Width
DIN Set-up Time
DIN Hold Time
DOUT Delay Time to BCKIN Falling Edge
DOUT Delay Time to LRCIN Edge
Rising Time of All Signals
Falling Time of All Signals
t
BCY
t
BCH
t
BCL
t
BL
t
LB
t
LRP
t
DIS
t
DIH
t
BDO
t
LDO
t
RISE
t
FALL
300ns (min)
120ns (min)
120ns (min)
40ns (min)
40ns (min)
t
BCY
(min)
40ns (min)
40ns (min)
40ns (max)
40ns (max)
20ns (max)
20ns (max)
FIGURE 4. Audio Data Input/Output Timing.
SYSTEM CLOCK
The system clock for the PCM3000/3001 must be either 256f
S
,
384f
S
or 512f
S
, where f
S
is the audio sampling frequency. The
system clock can be either a crystal oscillator placed between
XTI (Pin 20) and XTO (Pin 21), or an external clock input. If
an external clock is used, the clock is provided to either XTI
or CLKIO (Pin 22), and XTO is open. The PCM3000/3001
has an XTI clock detection circuit which senses if an XTI
clock is operating. When the external clock is delivered to
XTI, CLKIO is a buffered output of XTI. When XTI is
connected to ground, the external clock must be tied to
CLKIO. For best performance, the “External Clock Input 2”
circuit in Figure 5 is recommended.
The PCM3000/3001 also has a system clock detection circuit
which automatically senses if the system clock is operating at
®
256f
S
, 384f
S
, or 512f
S
. When a 384f
S
or 512f
S
system clock
is used, the clock is divided into 256f
S
automatically. The
256f
S
clock is used to operate the digital filters and the
modulators.
Table I lists the relationship of typical sampling frequencies
and system clock frequencies, and Figures 5 and 6 illustrate
the typical system clock connections and external system
clock timing.
SAMPLING RATE FREQUENCY
(kHz)
SYSTEM CLOCK FREQUENCY
(MHz)
256f
S
32
44.1
48
8.1920
11.2896
12.2880
384f
S
12.2880
16.9340
18.4320
512f
S
16.3840
22.5792
24.5760
TABLE I. System Clock Frequencies.
PCM3000/3001
12