CAT24C256
A.C. CHARACTERISTICS
(1)
V
CC
= .8 V to 5.5 V, T
A
= -40°C to 85°C,
unless otherwise specified.
1.8 V - 5.5 V
Symbol
F
SCL
T
I(2)
t
AA
t
BUF(2)
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R(2)
t
F(2)
t
SU:STO
t
DH
t
WR
t
PU(2), (3)
notes:
() Test conditions according to “A.C. Test Conditions” table.
(2) Tested initially and after a design or process change that affects this parameter.
(3) t
PU
is the delay between the time V
CC
is stable and the device is ready to accept commands.
2.5 V - 5.5 V
Min
Max
400
0.
0.9
.3
0.6
.3
0.6
0.6
0
0.
units
kHz
µs
µs
µs
µs
µs
µs
µs
µs
µs
0.3
0.3
0.6
0.
µs
µs
µs
µs
5
ms
ms
Parameter
Clock Frequency
Noise Suppression Time Constant at
SCL, SDA Inputs
SCL Low to SDA Data Out
Time the Bus Must be Free Before a
New Transmission Can Start
Start Condition Hold Time
Clock Low Period
Clock High Period
Start Condition Setup Time
Data In Hold Time
Data In Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Condition Setup Time
Data Out Hold Time
Write Cycle Time
Power-up to Ready Mode
Min
Max
00
0.
3.5
4.7
4
4.7
4
4.7
0
0.25
0.3
4
0.
5
A.C. TEST COnDITIOnS
Input Levels
Input Rise and Fall Times
Input Reference Levels
Output Reference Levels
Output Load
0.2 x V
CC
to 0.8 x V
CC
≤
50 ns
0.3 x V
CC
, 0.7 x V
CC
0.5 x V
CC
Current Source: I
OL
= 3 mA (V
CC
≥
2.5 V); I
OL
= mA (V
CC
< 2.5 V); C
L
= 00 pF
© 2007 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
3
Doc No. 04, Rev. D
CATALYST [ CATALYST SEMICONDUCTOR ]
