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CAT25C128SI-TE13 参数 Datasheet PDF下载

CAT25C128SI-TE13图片预览
型号: CAT25C128SI-TE13
PDF下载: 下载PDF文件 查看货源
内容描述: 128K / 256K位SPI串行E2PROM CMOS [128K/256K-Bit SPI Serial CMOS E2PROM]
分类和应用: 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件页数/大小: 11 页 / 63 K
品牌: CATALYST [ CATALYST SEMICONDUCTOR ]
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CAT25C128/256
STATUS REGISTER
The Status Register indicates the status of the device.
The
RDY
(Ready) bit indicates whether the CAT25C128/
256 is busy with a write operation. When set to 1 a write
cycle is in progress and when set to 0 the device
indicates it is ready. This bit is read only
The WEL (Write Enable) bit indicates the status of the
write enable latch . When set to 1, the device is in a Write
Enable state and when set to 0 the device is in a Write
Disable state. The WEL bit can only be set by the WREN
instruction and can be reset by the WRDI instruction.
The BPO and BP1 (Block Protect) bits indicate which
blocks are currently protected. These bits are set by the
user issuing the WRSR instruction. The user is allowed
STATUS REGISTER
7
WPEN
6
X
5
X
4
X
to protect quarter of the memory, half of the memory or
the entire memory by setting these bits. Once protected
the user may only read from the protected portion of the
array. These bits are non-volatile.
The WPEN (Write Protect Enable) is an enable bit for the
WP
pin. The
WP
pin and WPEN bit in the status register
control the programmable hardware write protect fea-
ture. Hardware write protection is enabled when
WP
is
low and WPEN bit is set to high. The user cannot write
to the status register (including the block protect bits and
the WPEN bit) and the block protected sections in the
memory array when the chip is hardware write pro-
tected. Only the sections of the memory array that are
not block protected can be written. Hardware write
protection is disabled when either
WP
pin is high or the
WPEN bit is zero.
3
BP1
2
BP0
1
WEL
0
RDY
BLOCK PROTECTION BITS
Status Register Bits
BP1
BPO
Array Address
Protected
25C128
0
0
1
1
0
1
0
1
None
3000-3FFF
2000-3FFF
0000-3FFF
25C256
None
6000-7FFF
4000-7FFF
0000-7FFF
No Protection
Quarter Array Protection
Half Array Protection
Full Array Protection
Protection
WRITE PROTECT ENABLE OPERATION
Protected
Blocks
Protected
Protected
Protected
Protected
Protected
Protected
Unprotected
Blocks
Protected
Writable
Protected
Writable
Protected
Writable
Status
Register
Protected
Writable
Protected
Protected
Protected
Writable
WPEN
0
0
1
1
X
X
WP
X
X
Low
Low
High
High
WEL
0
1
0
1
0
1
Doc. No. 25088-00 1/01
6