CS8140/1
Electrical Characteristics: continued
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
s
RESET
Threshold
HIGH V
R(HI)
LOW V
R(LOW)
Threshold Hysteresis(V
RH
)
Reset Output Leakage
RESET = HIGH
Output Voltage
Low(V
L(LOW)
)
Low (V
Rpeak
)
Delay Times
t
POR
t
WDI( RESET )
s
Watchdog
Input Voltage
HIGH
LOW
Input Current
Threshold Frequency
f
WDILOWER
f
WDI(UPPER)
**
WDI ² V
OUT
C
DELAY
= 0.1µF
64
218
77
262
96
326
Hz
Hz
2.0
0.8
0
10
V
V
µA
V
OUT
increasing
V
OUT
decreasing
(HIGH - LOW)
V
OUT
³ V
R(HI)
4.65
4.50
150
4.90
4.70
200
V
OUT
- 0.05
4.90
250
25
V
V
mV
µA
1V ² V
OUT
² V
R(LOW)
Rp = 2.7k�½*
V
OUT
, Power up, Power down
C
DELAY
= 0.1µF
30.0
0.5
0.1
0.6
47.5
1.0
0.4
1.0
65.0
1.5
V
V
ms
ms
* R
P
is connected to RESET and V
OUT
.
** CS8140 only
To observe safe operating junction temperature, low duty cycle pulse testing is used on tests where applicable.
Package Lead Description
Package Lead #
Lead Symbol
Function
7 Lead
TO-220
1
2
3
24 Lead *
SOIC Wide
21
23
24
14 Lead
PDIP
12
13
14
V
IN
ENABLE
RESET
Supply voltage to IC, usually direct from the battery.
CMOS compatible logical input. V
OUT
is disabled when
ENABLE is LOW and WDI is beyond its preset limits.
CMOS compatible output lead. RESET goes low whenever
V
OUT
drops below 4.5% of its typical value for more than
2µs or WDI signal falls outside itÕs window limits.
Ground connection.
Timing capacitor for Watchdog and RESET functions.
CMOS compatible input lead. The Watchdog function mon-
itors the falling edge of the incoming digital pulse train. The
signal is usually generated by the system microprocessor.
Regulated output voltage, 5V (typ).
Kelvin connection which allows remote sensing of output
voltage for improved regulation.
No connection.
4
5
6
12, 20
2
3
11
1
2
Gnd
Delay
WDI
7
N/A
4
5
1,6-11,13-19,22
3
4
5-10
V
OUT
Sense
NC
* The CS8141 uses a fused lead package. Leads 6-8 and 17-19 are fused together through the lead frame. These leads are
electrically connected to IC ground and should be connected to system ground for a good thermal connection.
3