CS8140/1
Figure 3: Timing Diagrams for Watchdog and ENABLE Functions
3a: V
OUT
when Watchdog is held high and ENABLE = HIGH.
Battery
V
IN
ENABLE
WDI
0V
RESET
0V
V
OUT 0V
Battery
POR
Normal Operation
WDI held High
3b: V
OUT
when Watchdog is held low and ENABLE = HIGH.
Battery
V
IN
ENABLE
WDI
0V
RESET
0V
V
OUT 0V
Battery
POR
Normal Operation
WDI held Low
3c: V
OUT
when Watchdog is too slow and ENABLE = HIGH.
Battery
V
IN
ENABLE
WDI
0V
RESET
0V
V
OUT 0V
Battery
POR
Normal Operation
Slow WDI signal
3d: V
OUT
when Watchdog is too fast and ENABLE = HIGH.
Battery
V
IN
ENABLE
WDI
0V
RESET
0V
V
OUT 0V
Battery
POR
Normal Operation
Fast WDI signal
3e: WDI held high after a normal period of operation; ENABLE = LOW.
Battery
V
IN
ENABLE
WDI
0V
RESET
0V
V
OUT 0V
Battery
POR
Normal Operation
WDI
high
Sleep Mode
POR
Normal Operation
3f: WDI held low or is too slow after a normal period of operation; ENABLE = LOW.
Battery
V
IN
ENABLE
WDI
0V
RESET
0V
V
OUT 0V
Battery
POR
Normal Operation
WDI
low
Sleep Mode
POR
Normal Operation
3g: WDI frequency rises above the upper frequency threshold after a normal period of operation; ENABLE = LOW
(for the CS8140 only).
Battery
V
IN
ENABLE
WDI
0V
RESET
0V
V
OUT 0V
POR
Normal Operation
Sleep Mode
POR
Normal Operation
Battery
7
CHERRY [ CHERRY SEMICONDUCTOR CORPORATION ]
