CS8420
DIGITAL INPUT CHARACTERISTICS
Parameters
Input Leakage Current
Differential Input Voltage, RXP to RXN
Symbol
I
in
V
TH
Min
-
200
Typ
±10
-
Max
±15
-
Units
μA
mVpp
DIGITAL INTERFACE SPECIFICATIONS
AGND = DGND = 0 V; all voltages with respect to 0 V.
Parameters
High-Level Output Voltage (I
OH
= -3.2 mA), except TXP/TXN
Low-Level Output Voltage (I
OH
= 3.2 mA), except TXP/TXN
High-Level Output Voltage (I
OH
= -21 mA), TXP, TXN
Low-Level Output Voltage (I
OH
= 21 mA), TXP, TXN
High-Level Input Voltage, except RXP, RXN
Low-Level Input Voltage, except RXP, RXN
V
IH
V
IL
Symbol
V
OH
V
OL
Min
(VD+) - 1.0
-
(VD+) - 0.7
-
2.0
-0.3
Max
-
0.4
-
0.7
(VD+) + 0.3
0.8
Units
V
V
V
V
V
V
TRANSMITTER CHARACTERISTICS
Parameters
TXP Output Resistance
TXN Output Resistance
Symbol
R
TXP
R
TXN
Typ
25
25
Units
Ω
Ω
SWITCHING CHARACTERISTICS
Inputs: Logic 0 = 0 V, Logic 1 = VD+; C
L
= 20 pF.
Parameter
RST pin Low Pulse Width
OMCK Frequency for OMCK = 512 * Fso
OMCK Low and High Width for OMCK = 512 * Fso
OMCK Frequency for OMCK = 384 * Fso
OMCK Low and High Width for OMCK = 384 * Fso
OMCK Frequency for OMCK = 256 * Fso
OMCK Low and High Width for OMCK = 256 * Fso
PLL Clock Recovery Sample Rate Range
RMCK output jitter
RMCK output duty cycle
RMCK Input Frequency
RMCK Input Low and High Width
AES3 Transmitter Output Jitter
5. Cycle-to-cycle jitter using 32-96 kHz external PLL components.
6. PLL is bypassed (RXD1:0 bits in the Clock Source Control register set to 10b), clock is input to the RMCK
pin.
8
DS245F4
Symbol
Min
200
4.096
8.2
3.072
12.3
2.048
16.4
8.0
-
40
2.048
16.4
-
Typ
-
-
-
-
-
-
-
-
200
50
-
-
-
Max
-
55.3
-
41.5
-
27.7
-
108.0
-
60
27.7
-
1
Units
μs
MHz
ns
MHz
ns
MHz
ns
kHz
ps RMS
%
MHz
ns
ns
CIRRUS [ CIRRUS LOGIC ]
