CY7C1049CV33
Switching Waveforms
(continued)
Write Cycle No. 1(WE Controlled, OE HIGH During Write)
[15, 16]
t
WC
ADDRESS
t
SCE
CE
t
AW
t
SA
WE
t
PWE
t
HA
OE
t
SD
DATA I/O
NOTE 17
t
HZOE
DATA
IN
VALID
t
HD
Write Cycle No. 2 (WE Controlled, OE LOW)
[16]
t
WC
ADDRESS
t
SCE
CE
t
AW
t
SA
WE
t
SD
DATA I/O
NOTE 17
t
HZWE
DATA VALID
t
PWE
t
HA
t
HD
t
LZWE
Notes:
14. Address valid prior to or coincident with CE transition LOW.
15. Data I/O is high-impedance if OE = V
IH
.
16. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
17. During this period the I/Os are in the output state and input signals should not be applied.
Document #: 38-05006 Rev. *C
Page 6 of 9
CYPRESS [ CYPRESS SEMICONDUCTOR ]
