DS2167/DS2168
HARDWARE MODE
The hardware mode is intended for preliminary system
prototyping or for applications which do not require the
features of the serial port. Tying SPS to VSS disables
the serial port, clears all internal registers and maps
IPD,
µ/A
and CP/EX of the X and Y side interfaces to the
port and address inputs. Input and output timeslots for
the X and Y side interfaces are fixed at 0. Such applica-
tions include, but are not limited to: 1) systems in which
timeslot and algorithm are fixed, 2) stand-alone ADPCM
combo applications, 3) “hardware” oriented systems
where no host controller is available.
HARDWARE MODE
Table 2
PIN #/NAME
4/A0
REG. LOCATION
CP/EX (X)
NAMES AND DESCRIPTION
Channel X coding
0 = Expand
1 = Compress
6/A2
µ/A
(X)
Channel X data format
0 = A-law
1 =
µ-law
7/A3
CP/EX (Y)
Channel Y coding
0 = Expand
1 = Compress
9/A5
µ/A
(Y).2
Channel Y data format
0 = A-law
1 =
µ-law
18/SDI
IPD (Y)
Y idle select
0 = Channel active
1 = Channel idle
19/CS
IPD (X)
X idle select
0 = Channel active
1 = Channel idle
NOTES:
1. SCLK, A1 and A4 must be tied to VSS when the hardware mode is selected.
2. When both X and Y sides are idled, the devices enter a stand-by mode which significantly reduces power
consumption.
3. The DS2167 will power-up within 200 ms after the X or Y side is reactivated (SDI and/or CS not equal to 0)
from standby.
4. The DS2168 must be hardware reset when reactivated from standby. Power-up occurs immediately after the
reset.
022698 4/15
DALLAS [ DALLAS SEMICONDUCTOR ]
