欢迎访问ic37.com |
会员登录 免费注册
发布采购

EDD5116AFTA-5B-E 参数 Datasheet PDF下载

EDD5116AFTA-5B-E图片预览
型号: EDD5116AFTA-5B-E
PDF下载: 下载PDF文件 查看货源
内容描述: 512M比特DDR SDRAM [512M bits DDR SDRAM]
分类和应用: 存储内存集成电路光电二极管动态存储器双倍数据速率时钟
文件页数/大小: 48 页 / 540 K
品牌: ELPIDA [ ELPIDA MEMORY ]
 浏览型号EDD5116AFTA-5B-E的Datasheet PDF文件第9页浏览型号EDD5116AFTA-5B-E的Datasheet PDF文件第10页浏览型号EDD5116AFTA-5B-E的Datasheet PDF文件第11页浏览型号EDD5116AFTA-5B-E的Datasheet PDF文件第12页浏览型号EDD5116AFTA-5B-E的Datasheet PDF文件第14页浏览型号EDD5116AFTA-5B-E的Datasheet PDF文件第15页浏览型号EDD5116AFTA-5B-E的Datasheet PDF文件第16页浏览型号EDD5116AFTA-5B-E的Datasheet PDF文件第17页  
EDD5108AFTA-5, EDD5116AFTA-5
Command Operation
Command Truth Table
DDR SDRAM recognize the following commands specified by the /CS, /RAS, /CAS, /WE and address pins. All other
combinations than those in the table below are illegal.
CKE
Command
Ignore command
No operation
Burst stop in read command
Column address and read command
Read with auto-precharge
Column address and write command
Write with auto-precharge
Row address strobe and bank active
Precharge select bank
Precharge all bank
Refresh
Symbol
DESL
NOP
BST
READ
READA
WRIT
WRITA
ACT
PRE
PALL
REF
SELF
Mode register set
MRS
EMRS
n–1
H
H
H
H
H
H
H
H
H
H
H
H
H
H
n
H
H
H
H
H
H
H
H
H
H
H
L
H
H
/CS
H
L
L
L
L
L
L
L
L
L
L
L
L
L
/RAS /CAS /WE
×
H
H
H
H
H
H
L
L
L
L
L
L
L
×
H
H
L
L
L
L
H
H
H
L
L
L
L
×
H
L
H
H
L
L
H
L
L
H
H
L
L
BA1
×
×
×
V
V
V
V
V
V
×
×
×
L
L
BA0
×
×
×
V
V
V
V
V
V
×
×
×
L
H
AP
×
×
×
L
H
L
H
V
L
H
×
×
L
L
Address
×
×
×
V
V
V
V
V
×
×
×
×
V
V
Remark: H: VIH. L: VIL.
×:
VIH or VIL V: Valid address input
Note: The CKE level must be kept for 1 CK cycle at least.
Ignore command [DESL]
When /CS is High at the cross point of the CK rising edge and the VREF level, every input are neglected and internal
status is held.
No operation [NOP]
As long as this command is input at the cross point of the CK rising edge and the VREF level, address and data
input are neglected and internal status is held.
Burst stop in read operation [BST]
This command stops a burst read operation, which is not applicable for a burst write operation.
Column address strobe and read command [READ]
This command starts a read operation. The start address of the burst read is determined by the column address
(See “Address Pins Table” in Pin Function) and the bank select address. After the completion of the read operation,
the output buffer becomes High-Z.
Read with auto-precharge [READA]
This command starts a read operation. After completion of the read operation, precharge is automatically executed.
Column address strobe and write command [WRIT]
This command starts a write operation. The start address of the burst write is determined by the column address
(See “Address Pins Table” in Pin Function) and the bank select address.
Write with auto-precharge [WRITA]
This command starts a write operation. After completion of the write operation, precharge is automatically executed.
Data Sheet E0741E20 (Ver. 2.0)
13