EDD5108AFTA-5, EDD5116AFTA-5
Function Truth Table
The following tables show the operations that are performed when each command is issued in each state of
the DDR SDRAM.
Current state
Precharging*1
/CS
H
L
/RAS /CAS /WE Address
Command
DESL
Operation
NOP
Next state
ldle
ldle
—
×
×
×
×
H
H
H
H
L
H
H
L
H
L
×
NOP
NOP
L
×
BST
ILLEGAL*11
ILLEGAL*11
ILLEGAL*11
ILLEGAL*11
NOP
L
H
L
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
×
READ/READA
WRIT/WRITA
ACT
—
L
L
—
L
H
H
L
H
L
—
L
L
PRE, PALL
ldle
—
L
L
×
ILLEGAL
NOP
Idle*2
H
L
×
×
×
×
DESL
ldle
ldle
—
H
H
H
H
L
H
H
L
H
L
×
NOP
NOP
L
×
BST
ILLEGAL*11
ILLEGAL*11
ILLEGAL*11
Activating
NOP
L
H
L
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
READ/READA
WRIT/WRITA
ACT
—
L
L
—
L
H
H
H
L
Active
ldle
L
L
PRE, PALL
Refresh/
ldle/
L
L
H
L
L
×
L
L
×
H
L
×
REF, SELF
MRS
Self refresh*12
Self refresh
MODE
Mode register set*12
ldle
Refresh
×
×
DESL
NOP
ldle
(auto-refresh)*3
L
L
L
L
H
L
L
L
L
L
L
L
H
L
L
L
H
H
H
L
H
H
L
H
L
×
NOP
BST
NOP
ldle
—
×
ILLEGAL
ILLEGAL
ILLEGAL
NOP
×
×
—
×
×
×
—
Activating*4
×
×
×
×
DESL
Active
Active
—
H
H
H
H
L
H
H
L
H
L
×
NOP
NOP
×
BST
ILLEGAL*11
ILLEGAL*11
ILLEGAL*11
ILLEGAL*11
ILLEGAL*11
ILLEGAL
NOP
H
L
BA, CA, A10
READ/READA
WRIT/WRITA
ACT
—
L
BA, CA, A10
—
H
H
L
H
L
BA, RA
—
L
BA, A10
PRE, PALL
—
L
×
×
—
Active*5
×
×
×
×
DESL
Active
Active
Active
H
H
H
H
H
L
H
L
×
NOP
NOP
×
BST
ILLEGAL
H
BA, CA, A10
READ/READA
Starting read operation Read/READA
Write
Starting write operation recovering/
precharging
L
H
L
L
BA, CA, A10
WRIT/WRITA
L
L
L
L
L
L
H
H
L
H
L
BA, RA
BA, A10
×
ACT
ILLEGAL*11
Pre-charge
ILLEGAL
—
PRE, PALL
Idle
—
×
Data Sheet E0741E20 (Ver. 2.0)
15
ELPIDA [ ELPIDA MEMORY ]
