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EM39LV80090H 参数 Datasheet PDF下载

EM39LV80090H图片预览
型号: EM39LV80090H
PDF下载: 下载PDF文件 查看货源
内容描述: 8M位( 512Kx16 )闪存 [8M Bits (512Kx16) Flash Memory]
分类和应用: 闪存
文件页数/大小: 25 页 / 295 K
品牌: EMC [ ELAN MICROELECTRONICS CORP ]
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EM39LV800
8M Bits (512Kx16) Flash Memory
SPECIFICATION
Device Operation
The EM39LV800 uses Commands to initiate the memory operation functions. The
Commands are written to the device by asserting WE# Low while keeping CE# Low. The
address bus is latched on the falling edge of WE# or CE#, whichever occurs last. The data
bus is latched on the rising edge of WE# or CE#, whichever occurs first.
Read
The Read operation of the EM39LV800 is controlled by CE# and OE#. Both have to be Low
for the system to obtain data from the outputs. CE# is used for device selection. When CE#
is high, the chip is deselected and only standby power is consumed. OE# is the output
control and is used to gate data from the output pins. The data bus is in high impedance state
when either CE# or OE# is high. Refer to the Read Cycle Timing Diagram in Figure 1 for
further details.
Word Program
The EM39LV800 is programmed on a word-by-word basis. Before programming, the sector
where the word is located must be erased completely. The Program operation is
accomplished in three steps:
The first step is a three-byte load sequence for Software Data Protection.
The second step is to load word address and word data. During the Word Program
operation, the addresses are latched on the falling edge of either CE# or WE#, whichever
occurs last; and the data is latched on the rising edge of either CE# or WE#, whichever
occurs first.
The third step is the internal Program operation which is initiated after the rising edge of
the fourth WE# or CE#, whichever occurs first. The Program operation, once initiated,
will be completed within 20 µs. See Figures 2 and 3 for WE# and CE# controlled
Program operation timing diagrams respectively and Figure 15 for flowchart.
During the Program operation, the only valid reads are Data# Polling and Toggle Bit. During
the internal Program operation, the host is free to perform additional tasks. Any command
issued during the internal Program operation is ignored.
This specification is subject to change without further notice. (04.09.2004 V1.0)
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