EM78P350N
8-Bit Microprocessor with OTP ROM
6.1.4 R3 (Status Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PS2
PS1
PS0
T
P
Z
DC
C
Bits 7 ~ 5 (PS2 ~ PS0) Page select bits. PS2~PS0 are used to pre-select a program
memory page. When executing a "JMP", "CALL", or other instructions which causes
the program counter to change (e.g. MOV R2, A), PS2~PS0 are loaded into the
11th,12th and 13th bits of the program counter and select one of the available program
memory pages. Note that RET (RETL, RETI) instruction does not change the
PS2~PS0 bits. That is, the return will always be to the page from where the subroutine
was called, regardless of the PS2~PS0 bits current setting.
PS2
0
PS1
0
PS0
0
Program Memory Page [Address]
Page 0 [0000-03FF]
Page 1 [0400-07FF]
Page 2 [0800-0BFF]
Page 3 [0C00-0FFF]
Page 4 [1000-13FF]
Page 5 [1400-17FF]
Page 6 [1800-1BFF]
Page 7 [1C00-1FFF]
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Bit 4 (T): Time-out bit. Set to 1 by the "SLEP" and "WDTC" commands or during power
on and reset to 0 by WDT time-out.
Bit 3 (P): Power-down bit. Set to 1 during power-on or by a "WDTC" command and
reset to 0 by a "SLEP" command.
NOTE
Bit 4 & Bit 3 (T & P) are read only.
Bit 2 (Z): Zero flag. Set to "1" if the result of an arithmetic or logic operation is zero.
Bit 1 (DC): Auxiliary carry flag
Bit 0 (C): Carry flag
6.1.5 R4 (RAM Select Register)
Bit 7 & Bit 6: are used to select Banks 0 ~ 3.
Bit 5 ~ Bit 0: are used to select registers (address: 00 ~ 3F) in the indirect address
mode.
See the table under Section 6.1.3.1 Data Memory Configuration for the configuration of
the data memory.
Product Specification (V 1.0) 09.14.2006
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
