EM78P350N
8-Bit Microprocessor with OTP ROM
6.1.6 R5 ~ R8 (Port 5 ~ Port 8)
R5 ~ R7 are I/O registers.
R8 is an I/O register. The upper 3 bits of R8 are fixed to 0.
6.1.7 R9 (TMR4: Timer 4 Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
TMR47
TMR46
TMR45
TMR44
TMR43
TMR42
TMR41
TMR40
TMR47~TMR40 are set of Timer 4 register bits which are incremented until the value
matches PWP and then, it resets to 0.
6.1.8 RA (SPIRB: SPI Read Buffer)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SRB7
SRB6
SRB5
SRB4
SRB3
SRB2
SRB1
SRB0
SRB7~SRB0 are 8-bit data when transmission is completed by SPI.
6.1.9 RB (SPIWB: SPI Write Buffer)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SWB7
SWB6
SWB5
SWB4
SWB3
SWB2
SWB1
SWB0
SWB7~SWB0 are 8-bit data, waiting for transmission by SPI.
6.1.10 RC (SPIS: SPI Status Register)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
DORD
TD1
TD0
T4ROS
OD3
OD4
-
RBF
Bit 7 (DORD): Data transmission order.
0 :Shift left (MSB first)
1 :Shift right (LSB first)
Bit 6~Bit 5: Sout Status output Delay times Options
TD1
0
TD0
0
Delay Time
8 CLK
0
1
16 CLK
24 CLK
32 CLK
1
0
1
1
Bit 4 (T4ROS): Timer4 Read Out Buffer Select Bit
0 : Read Value from Timer 4 Preset Register.
1 : Read Value from Timer 4 Counter Register.
Bit 3 (OD3): Open-Drain Control bit
0 = Open-drain disable for Sout
1 = Open-drain enable for Sout
10 •
Product Specification (V1.0) 09.14.2006
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
