EM78P447N
OTP ROM
3. PIN ASSIGNMENT
P55
P54
TCC
VDD
NC
Vss
/INT
P50
P51
P52
P53
P60
P61
P62
P63
P64
1
2
3
4
5
6
7
8
9
10
11
12
13
14
DIP
SOP
EM78P447NAP
EM78P447NAM
28
27
26
25
24
23
22
21
20
19
18
17
16
15
/RESET
OSCI
OSCO
P77
P76
P75
P74
P73
P72
P71
P70
P67
P66
P65
Vss
TCC
VDD
/INT
P50
P51
P52
P53
P60
P61
P62
P63
P64
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SSOP
28
27
26
25
24
23
22
21
20
19
18
17
16
15
/RESET
OSCI
OSCO
P77
P76
P75
P74
P73
P72
P71
P70
P67
P66
P65
TCC
VDD
NC
Vss
/INT
P50
P51
P52
P53
P60
P61
P62
P63
P64
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
DIP
SOP
EM78P447NBP
EM78P447NBWM
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
P56
P57
/RESET
OSCI
OSCO
P77
P76
P75
P74
P73
P72
P71
P70
P67
P66
P65
Fig. 1 Pin Assignment
Table 1 EM78P447NAP and EM78P447NAM Pin Description
Symbol Pin No.
VDD
2
OSCI
OSCO
TCC
/RESET
P50~P53
27
26
1
28
6~9
Type
-
I
I/O
I
I
I/O
I/O
I/O
Function
* Power supply.
* XTAL type: Crystal input terminal or external clock input pin.
* RC type: RC oscillator input pin.
* XTAL type: Output terminal for crystal oscillator or external clock input pin.
* RC type: Instruction clock output.
* External clock signal input.
* The real time clock/counter (with Schmitt trigger input pin) must be tied to
VDD or VSS if not in use.
* Input pin with Schmitt trigger. If this pin remains at logic low, the controller
will also remain in reset condition.
* P50~P53 are bi-directional I/O pins.
* P60~P67 are bi-directional I/O pins. These can be pulled-high internally
by software control.
* P70~P77 are bi-directional I/O pins.
* P74~P75 can be pulled-high internally by software control.
* P76~P77 can have open-drain output by software control.
* P70 and P71 can also be defined as the R-option pins.
6
10.21.2004 (V1.0)
EM78P447NAS
P60~P67 10~17
P70~P77 18~25
This specification is subject to change without prior notice.
EMC [ ELAN MICROELECTRONICS CORP ]
