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EM624FS16AT-70S 参数 Datasheet PDF下载

EM624FS16AT-70S图片预览
型号: EM624FS16AT-70S
PDF下载: 下载PDF文件 查看货源
内容描述: 128K X16位低功耗和低电压全CMOS静态RAM [128K x16 bit Low Power and Low Voltage Full CMOS Static RAM]
分类和应用:
文件页数/大小: 11 页 / 392 K
品牌: EMLSI [ Emerging Memory & Logic Solutions Inc ]
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EM620FU16B Series  
Low Power, 128Kx16 SRAM  
128K x16 Bit Low Power and Low Voltage CMOS Static RAM  
GENERAL DESCRIPTION  
FEATURES  
The EM620FU16B series are fabricated by EMLSI’s  
advanced full CMOS process technology. The families  
support industrial temperature range and Chip Scale Pack-  
age for user flexibility of system design. The families also  
supports low data retention voltage for battery back-up  
operation with low data retention current.  
- Process Technology : 0.15mm Full CMOS  
- Organization : 128K x16  
- Power Supply Voltage  
=> EM620FU16B Series: 2.7V~3.3V  
- Low Data Retention Voltage : 1.5V (MIN)  
- Three state output and TTL Compatible  
- Packaged product designed for 45/55/70ns  
- Package Type: 48-FpBGA  
The EM620FU16B series are available in KGD and  
JEDEC standard 48 pin 6mm x 7mm BGA package.  
PRODUCT FAMILY  
Power Dissipation  
Product  
Family  
Operating  
Temperature  
Vcc Range  
Speed  
PKG Type  
Standby  
(ISB1, Typ.)  
Operating  
(ICC1.Max)  
Industrial (-40 ~ 85oC)  
Industrial (-40 ~ 85oC)  
Industrial (-40 ~ 85oC)  
45ns  
55ns  
70ns  
EM620FU16B-45LF  
EM620FU16B-55LF  
EM620FU16B-70LF  
2.7V~3.3V  
2.7V~3.3V  
2.7V~3.3V  
1µA  
1µA  
1µA  
3mA  
3mA  
3mA  
48-FpBGA  
48-FpBGA  
48-FpBGA  
FUNCTIONAL BLOCK DIAGRAM  
PIN DESCRIPTIO  
1
2
3
4
5
6
Pre-charge Circuit  
A
B
C
D
LB  
OE  
A0  
A3  
A1  
A4  
A6  
A2  
CS2  
I/O8 UB  
CS1 I/O0  
I/O1 I/O2  
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
A9  
VCC  
VSS  
I/O9 I/O10 A5  
Memory Array  
1024 x 2048  
V
I/O11 DNU A7  
I/O3  
V
CC  
SS  
E
V
I/O12 DNU A16 I/O4  
V
SS  
CC  
Data  
I/O0 ~ I/O7  
I/O8 ~ I/O15  
Cont  
F
G
H
I/O14 I/O13 A14 A15 I/O5 I/O6  
I/O15 DNU A12 A13 WE I/O7  
I/O Circuit  
Data  
Cont  
Column Select  
DNU A8  
A9  
A10 A11 DNU  
A14  
A15  
A16  
A11  
A13  
A10  
A12  
48-FpBGA: Top view (Ball down)  
WE  
OE  
Name  
Function  
Name  
Function  
UB  
Control Logic  
LB  
CS1, CS2  
OE  
Chip select inputs  
Vcc  
Power Supply  
Ground  
CS1  
CS2  
Output Enable input Vss  
Upper Byte (I/O9~16  
)
WE  
Write Enable input  
Address Inputs  
UB  
LB  
Lower Byte (I/O1~8  
No Connection  
)
A0~A16  
I/O0~I/O15 Data Inputs/Outputs NC  
2