R
H6006
Timer Reaction
Conditions:
V
IN
> V
RL
after
power-up sequence.
T
TCL
______
TCL
TO
T
TO
T
TO
T
TO
RES
Timer
Reset
TO
Timeout
RES
Timeout
Timer
Reset
Timer
Reset
Fig. 5
Combined Voltage and Timer Reaction
V
SH
V
SL
V
RL
V
IN
T
DB
SAVE
RES
TO
TCL
Power-on
Reset
T
TO
T
TO
T
TO
T
TO
TO
Timeout
RES
Timeout
Timer
Reset
TO
Timeout
Timer
Stop
Fig. 6
Block Diagram
V
DD
1
2
V
IN
Band-Gap
Reference
V
SH
Save
Control
SAVE
V
SL
Reset
V
RL
Control
RES
Version
B1
A2, B2
A3, B3
TO
TCL
Connections
1 and 3
1
2
Fig. 7
V
SS
RC
3
OSC
Timer
Copyright © 2004, EM Microelectronic-Marin SA
4
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