PBM 3960/1
D0-D7
Counter
PROM
PBM 3960/1
PBL 3771/1
A0
WR
CE
CS
Clock Up/Dn
A1 Vref
Step
Voltage
Reference
Control Logic
Direction
Figure 13. Typical blockdiagram of an application without a microprocessor. Available as testboard, TB 307i/2.
V
V
(+5 V)
CC
MM
+
0.1 mF
0.1 mF
4
10 mF
11
3
20
5
14
V
V
V
V
CC
MM1
MM2
M
M
M
D0
D7
DD
7
8
9
A1
3
4
2
Phase
Sign
1
1
CD
CD
1
1
1
B1
A2
B2
7
V
DA
To
mP
R1
1
PBM 3960/1
3771/1
PBL
19
15
16
A0
A1
16
20
19
21
Phase
Sign
2
2
6
17
22
1
15
14
WR
CS
CD
2
CD
2
22
M
V
DA
RESET
R2
2
+2.5V
V
V
GND
C
E
C
E
2
RC
12
STEPPER
MOTOR
Ref
SS
18
2
1
1
2
21
13
5, 6,
17, 18
10
1 kW
1 kW
15 kW
+5 V
Pin numbers refer
to DIL package.
820 pF
1.0 W
820 pF
1.0 W
3 300 pF
R
R
S
S
GND
(V
)
GND (V
)
MM
CC
Figure 14. Typical application in a microprocessor based system.
8
ERICSSON [ ERICSSON ]
