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M12L64164A-7TA 参数 Datasheet PDF下载

M12L64164A-7TA图片预览
型号: M12L64164A-7TA
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×16位×4银行同步DRAM [1M x 16 Bit x 4 Banks Synchronous DRAM]
分类和应用: 动态存储器
文件页数/大小: 44 页 / 811 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT
AC CHARACTERISTICS
(AC operating condition unless otherwise noted)
PARAMATER
CLK cycle time
CLK to valid
output delay
Output data
hold time
CLK high pulsh width
CLK low pulsh width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
Note :
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
CAS latency = 3
CAS latency = 2
SYMBOL
t
CC
-6
MIN
6
8
MAX
-
5.5
6
2.5
2.5
2.5
2.5
1.5
1
0
5.5
6
2.5
2.5
2.5
2.5
1.5
1
0
6
6
MIN
7
10
-7
MAX
-
6
6
M12L64164A
Operation temperature condition -25℃ ~ 85℃
UNIT
ns
NOTE
1
t
SAC
ns
1,2
t
OH
t
CH
t
CL
t
SS
t
SH
t
SLZ
t
SHZ
ns
ns
ns
ns
ns
ns
ns
2
3
3
3
3
2
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns. (tr/2 - 0.5) ns should be considered.
3. Assumed input rise and fall time (tr & tf) =1ns.
If tr & tf is longer than 1ns. transient time compensation should be considered.
i.e., [(tr + tf)/2 – 1] ns should be added to the parameter.
Elite Semiconductor Memory Technology Inc.
Publication Date: Dec. 2004
Revision: 0.1
6/44