ESMT
Pin Arrangement
M13S128324A
Operation Temperature Condition -40~85°C
DQ29
V
SSQ
DQ30
DQ31
V
SS
V
DDQ
N.C
N.C
N.C
N.C
N.C
V
SSQ
N.C
DQS
V
DDQ
V
DD
DQ0
DQ1
V
SSQ
DQ2
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
50
49
48
47
46
A
7
A
6
A
5
A
4
V
SS
A
9
N.C
N.C
N.C
N.C
N.C
N.C
N.C
A11
A10
V
DD
A
3
A
2
A
1
A
0
100 Pin LQFP
Forward Type
20 x 14 mm
0.65 mmpin Pitch
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
Pin Description
(M13S128324A)
Pin Name
Function
Address inputs
- Row address A0~A11
- Column address A0~A7
A8/AP : AUTO Precharge
BA0, BA1 : Bank selects (4 Banks)
Data-in/Data-out
Row address strobe
Column address strobe
Write enable
Ground
Power
Bi- directional Data Strobe.
DQS0 correspond to the data on DQ0~DQ7.
DQS1 correspond to the data on DQ8~DQ15.
DQS2 correspond to the data on DQ16~DQ23.
DQS3 correspond to the data on DQ24~DQ31.
Bi- directional Data Strobe.
Pin Name
Function
A0~A11,
BA0,BA1
DM0~DM3
DQ Mask enable in write cycle.
DQ0~DQ31
RAS
CAS
WE
CLK, CLK
CKE
CS
V
DDQ
V
SSQ
V
REF
Clock input
Clock enable
Chip select
Supply Voltage for GDQ
Ground for DQ
Reference Voltage for SSTL
V
SS
V
DD
DQS0~DQS3
(for FBGA)
DQS
(for LQFP)
NC
No connection
-
-
Elite Semiconductor Memory Technology Inc.
Publication Date : Dec. 2007
Revision : 1.0
4/49
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
