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M13S128324A_1 参数 Datasheet PDF下载

M13S128324A_1图片预览
型号: M13S128324A_1
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×32位×4银行双倍数据速率SDRAM [1M x 32 Bit x 4 Banks Double Data Rate SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 49 页 / 882 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT
Absolute Maximum Rating
Parameter
Voltage on any pin relative to V
SS
Voltage on V
DD
supply relative to V
SS
Voltage on V
DDQ
supply relative to V
SS
Storage temperature
Power dissipation
Short circuit current
Note :
Symbol
V
IN
, V
OUT
V
DD
, V
DDQ
V
DDQ
T
STG
P
D
I
OS
Value
-0.5 ~ 3.6
-1.0 ~ 3.6
-0.5 ~ 3.6
-55 ~ +150
2
50
M13S128324A
Operation Temperature Condition -40~85°C
Unit
V
V
V
°C
W
mA
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC Operation Condition & Specifications
DC Operation Condition
Recommended operating conditions (Voltage reference to V
SS
= 0V, T
A
= -40 to 85 °C )
Parameter
Supply voltage
I/O Supply voltage
I/O Reference voltage
I/O Termination voltage (system)
Input logic high voltage
Input logic low voltage
Input leakage current
Output leakage current
Output High Current (Normal strength driver)
(V
OUT
=V
DDQ
-0.373V, min V
REF
, min V
TT
)
Output Low Current (Normal strength driver)
(V
OUT
= 0.373V)
Output High Current (Weak strength driver)
(V
OUT
=V
DDQ
-0.763V, min V
REF
, min V
TT
)
Output Low Current (Weak strength driver)
(V
OUT
= 0.763V)
Symbol
V
DD
V
DDQ
V
REF
V
TT
V
IH
(DC)
V
IL
(DC)
I
I
I
OZ
I
OH
I
OL
I
OH
I
OL
Min
2.375
2.375
0.49*V
DDQ
V
REF
- 0.04
V
REF
+ 0.15
-0.3
-5
-5
-16.8
+16.8
-9
+9
Max
2.625
2.625
0.51*V
DDQ
V
REF
+ 0.04
V
DDQ
+ 0.3
V
REF
- 0.15
5
5
Unit
V
V
V
V
V
V
1
2
Note
μ
A
μ
A
mA
mA
mA
mA
3
Notes 1. V
REF
is expected to be equal to 0.5* V
DDQ
of the transmitting device, and to track variations in the DC level of the
same. Peak-to-peak noise on V
REF
may not exceed 2% of the DC value.
2.
V
TT
is not applied directly to the device. V
TT
is system supply for signal termination resistors, is expected to be set
equal to V
REF
, and must track variations in the DC level of V
REF
.
Elite Semiconductor Memory Technology Inc.
Publication Date : Dec. 2007
Revision : 1.0
5/49