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M13S128168A_08 参数 Datasheet PDF下载

M13S128168A_08图片预览
型号: M13S128168A_08
PDF下载: 下载PDF文件 查看货源
内容描述: 2M ×16位×4银行双倍数据速率SDRAM [2M x 16 Bit x 4 Banks Double Data Rate SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 49 页 / 1542 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT
AC Timing Parameter & Specifications-continued
Parameter
Half Clock Period
DQ-DQS output hold time
Data hold skew factor
ACTIVE to PRECHARGE command
Row Cycle Time
AUTO REFRESH Row Cycle Time
ACTIVE to READ,WRITE delay
PRECHARGE command period
ACTIVE to READ with
AUTOPRECHARGE command
ACTIVE bank A to ACTIVE bank B
command
Write recovery time
Write data in to READ command delay
Col. Address to Col. Address delay
Average periodic refresh interval
Write preamble
Write postamble
DQS read preamble
DQS read postamble
Clock to DQS write preamble setup
time
Load Mode Register / Extended Mode
register cycle time
Exit self refresh to READ command
Exit self refresh to non-READ
command
Autoprecharge write
recovery+Precharge time
M13S128168A
Symbol
t
HP
t
QH
t
QHS
t
RAS
t
RC
t
RFC
t
RCD
t
RP
t
RAP
t
RRD
t
WR
t
WTR
t
CCD
t
REFI
t
WPRE
t
WPST
t
RPRE
t
RPST
t
WPRES
t
MRD
t
XSRD
t
XSNR
-4
Min
t
CL
min or
t
CH
min
t
HP
-t
QHS
-
40
52
60
15
15
18
10
15
2
1
-
0.25
0.4
0.9
0.4
0
2
200
75
(t
WR
/t
CK
)
+
(t
RP
/t
CK
)
-5
Max
-
-
0.5
70K
-
-
-
-
-
-
-
-
-
15.6
-
0.6
1.1
0.6
-
-
-
-
-6
Max
-
-
0.45
70K
-
-
-
-
-
-
-
-
-
15.6
-
0.6
1.1
0.6
-
-
-
-
Min
t
CL
min or
t
CH
min
t
HP
-t
QHS
-
40
60
70
15
15
18
10
15
2
1
-
0.25
0.4
0.9
0.4
0
2
200
75
(t
WR
/t
CK
)
+
(t
RP
/t
CK
)
Min
t
CL
min or
t
CH
min
t
HP
-t
QHS
-
42
60
72
18
18
18
12
15
2
1
-
0.25
0.4
0.9
0.4
0
1
200
75
(t
WR
/t
CK
)
+
(t
RP
/t
CK
)
Max
-
-
0.5
70K
-
-
-
-
-
-
-
-
-
15.6
-
0.6
1.1
0.6
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
CK
t
CK
us
t
CK
t
CK
t
CK
t
CK
ns
t
CK
t
CK
ns
t
DAL
-
t
CK
Elite Semiconductor Memory Technology Inc.
Publication Date : Dec. 2008
Revision : 2.2
7/49