ESMT
FUNCTIONAL BLOCK DIAGRAM
CLK
CKE
Address
Mode
Register
Clock
Generator
M52S64322A
Bank D
Bank C
Bank B
Row Decoder
Row
Address
Buffer
&
Refresh
Counter
Bank A
Sense Amplifier
Command Decoder
Control Logic
CS
RAS
CAS
WE
Input & Output
Buffer
Latch Circuit
Column
Address
Buffer
&
Refresh
Counter
DQM 0~3
Column Decoder
Data Control Circuit
DQ
PIN FUNCTION DESCRIPTION
PIN
CLK
CS
CKE
A0 ~ A10
BA0 , BA1
NAME
System Clock
Chip Select
Clock Enable
Address
Bank Select Address
INPUT FUNCTION
Active on the positive going edge to sample all inputs
Disables or enables device operation by masking or enabling all
inputs except CLK , CKE and DQM0~3.
Masks system clock to freeze operation from the next clock cycle.
CKE should be enabled at least one cycle prior new command.
Disable input buffers for power down in standby.
Row / column address are multiplexed on the same pins.
Row address : RA0~RA10, column address : CA0~CA7
Selects bank to be activated during row address latch time.
Selects bank for read / write during column address latch time.
Latches row addresses on the positive going edge of the CLK with
RAS
Row Address Strobe
RAS low.
Enables row access & precharge.
Latches column address on the positive going edge of the CLK with
CAS
Column Address Strobe
CAS low.
Enables column access.
Enables write operation and row precharge.
WE
Write Enable
Data Input / Output Mask
Data Input / Output
Power Supply / Ground
Data Output Power / Ground
No Connection
Latches data in starting from CAS ,
WE
active.
Makes data output Hi-Z, t
SHZ
after the clock and masks the output.
Blocks data input when DQM active.
Data inputs / outputs are multiplexed on the same pins.
Power and ground for the input buffers and the core logic.
Isolated power supply and ground for the output buffers to provide
improved noise immunity.
This pin is recommended to be left No Connection on the device.
DQM0~3
DQ0 ~ DQ31
VDD / VSS
VDDQ / VSSQ
NC
Elite Semiconductor Memory Technology Inc.
Publication Date: Aug. 2009
Revision: 1.3
2/47
ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
