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M53D128168A_1 参数 Datasheet PDF下载

M53D128168A_1图片预览
型号: M53D128168A_1
PDF下载: 下载PDF文件 查看货源
内容描述: 2M ×16位×4银行移动DDR SDRAM [2M x 16 Bit x 4 Banks Mobile DDR SDRAM]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 46 页 / 1076 K
品牌: ESMT [ ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC. ]
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ESMT
AC Timing Parameter & Specifications-continued
Parameter
Half Clock Period
DQ-DQS output hold time
Data hold skew factor
ACTIVE to PRECHARGE
command
Row Cycle Time
AUTO REFRESH Row Cycle
Time
ACTIVE to READ,WRITE
delay
PRECHARGE command
period
Minimum t
CKE
High/Low time
ACTIVE bank A to ACTIVE
bank B command
Write recovery time
Write data in to READ
command delay
Col. Address to Col. Address
delay
Average periodic refresh
interval
Write preamble
Write postamble
DQS read preamble
DQS read postamble
Clock to DQS write preamble
setup time
Load Mode Register /
Extended Mode register
cycle time
Exit self refresh to first valid
command
Exit power-down mode to
first valid command
Autoprecharge write
recovery+Precharge time
Symbol
t
HP
t
QH
t
QHS
t
RAS
t
RC
t
RFC
t
RCD
t
RP
t
CKE
t
RRD
t
WR
t
WTR
t
CCD
t
REFI
t
WPRE
t
WPST
t
RPRE
t
RPST
t
WPRES
t
MRD
t
XSR
t
XP
t
DAL
-7.5
min
t
CL
min or t
CH
min
t
HP
min-t
QHS
-
45
67.5
80
22.5
22.5
2
15
15
1
1
-
0.25
0.4
0.9
0.4
0
2
120
25
(t
WR
/t
CK
)
+
(t
RP
/t
CK
)
-
-
-
-
15.6
-
0.6
1.1
0.6
-
-
-
-
-
max
-
-
0.75
70K
-
-
-
-
M53D128168A
Operation Temperature Condition -40°C~85°C
-10
min
t
CL
min or t
CH
min
t
HP
min-t
QHS
-
50
80
90
30
30
2
15
15
1
1
-
0.25
0.4
0.9
0.4
0
2
120
25
(t
WR
/t
CK
)
+
(t
RP
/t
CK
)
-
-
-
-
15.6
-
0.6
1.1
0.6
-
-
-
-
-
max
-
-
1.0
70K
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
t
CK
ns
t
CK
t
CK
t
CK
us
t
CK
t
CK
t
CK
t
CK
ns
t
CK
ns
ns
ns
Elite Semiconductor Memory Technology Inc.
Publication Date : Dec. 2008
Revision : 1.0
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