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    XRT73LC04AIV 参数 Datasheet PDF下载

    XRT73LC04AIV图片预览
    型号： XRT73LC04AIV
    PDF下载： 下载PDF文件 查看货源
    内容描述： 4路DS3 / E3 / STS - 1线路接口单元 [4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT]
    分类和应用： 数字传输接口电信集成电路电信电路PC
    文件页数/大小： 64 页 / 726 K
    品牌： EXAR [ EXAR CORPORATION ]
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    XRT73LC04A
    4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
    REV. 1.0.1
    C
    OMMAND
    R
    EGISTER
    CR-2(
    N
    ) ............................................................................................................ 37
    3.3 C
    LOCK
    R
    ECOVERY
    PLL ..................................................................................................................
    The Training Mode .............................................................................................................................
    The Data/Clock Recovery Mode ........................................................................................................
    3.4 T
    HE
    HDB3/B3ZS D
    ECODER
    ..........................................................................................................
    B3ZS Decoding (DS3/STS-1 Applications) ........................................................................................
    Figure 24.An Example of B3ZS Decoding ......................................................................................................
    HDB3 Decoding (E3 Applications) .....................................................................................................
    Figure 25.An Example of HDB3 Decoding ......................................................................................................
    Configuring the HDB3/B3ZS Decoder ................................................................................................
    38
    38
    38
    38
    38
    38
    38
    39
    39
    C
    OMMAND
    R
    EGISTER
    CR3-(
    N
    ) ............................................................................................................ 39
    3.5 LOS D
    ECLARATION
    /C
    LEARANCE
    ..................................................................................................... 39
    The LOS Declaration/Clearance Criteria for E3 Applications ............................................................. 39
    Figure 26.The Signal Levels that the XRT73LC04A declares and clears LOS ............................................... 40
    Figure 27.The Behavior of the LOS Output Indicator in response to the Loss of Signal and the Restoration of
    Signal ................................................................................................................................................ 41
    The LOS Declaration/Clearance Criteria for DS3 and STS-1 Applications ........................................ 41
    Table 5:The ALOS (Analog LOS) Declare and Clear Thresholds for a given setting of LOSTHR and REQEN
    (DS3 and STS-1 Applications) ........................................................................................................... 41
    C
    OMMAND
    R
    EGISTER
    CR0-(
    N
    ) ............................................................................................................ 42
    C
    OMMAND
    R
    EGISTER
    CR2-(
    N
    ) ............................................................................................................ 42
    C
    OMMAND
    R
    EGISTER
    CR0-(
    N
    ) ............................................................................................................ 42
    C
    OMMAND
    R
    EGISTER
    CR2-(
    N
    ) ............................................................................................................ 42
    Muting the Recovered Data while the LOS is being Declared ........................................................... 42
    C
    OMMAND
    R
    EGISTER
    CR3-(
    N
    ) ............................................................................................................ 43
    3.6 R
    OUTING THE
    R
    ECOVERED
    T
    IMING AND
    D
    ATA
    I
    NFORMATION TO THE
    R
    ECEIVING
    T
    ERMINAL
    E
    QUIPMENT
    .
    43
    Routing Dual-Rail Format Data to the Receiving Terminal Equipment .............................................. 43
    Figure 28.The typical interface for the Transmission of Data in a Dual-Rail Format, from the Receive Section of
    the XRT73LC04A to the Receiving Terminal Equipment .................................................................. 43
    Figure 29.How the XRT73LC04A outputs data on the RPOS and RNEG output pins .................................... 44
    Figure 30.The Behavior of the RPOS, RNEG, and RxClk signals when RxClk is inverted ............................. 44
    C
    OMMAND
    R
    EGISTER
    CR3-(
    N
    ) ............................................................................................................ 45
    Routing Single-Rail Format (Binary Data Stream) data to the Receive Terminal Equipment ............ 45
    C
    OMMAND
    R
    EGISTER
    CR3-(
    N
    ) ............................................................................................................ 45
    Figure 31.The typical interface for the Transmission of Data in a Single-Rail Format from the Receive Section
    of the XRT73LC04A to the Receiving Terminal Equipment .............................................................. 45
    Figure 32.The behavior of the RPOS and RxClk output signals while the XRT73LC04A is transmitting Single-
    Rail data to the Receiving Terminal Equipment ................................................................................ 46
    3.7 S
    HUTTING
    OFF
    THE
    R
    ECEIVE
    S
    ECTION
    ........................................................................................... 46
    C
    OMMAND
    R
    EGISTER
    CR3-(
    N
    ) ............................................................................................................ 46
    4.0 DIAGNOSTIC FEATURES OF THE XRT73LC04A ................................................................................. 47
    4.1 T
    HE
    A
    NALOG
    L
    OCAL
    L
    OOP
    -B
    ACK
    M
    ODE
    ......................................................................................... 47
    Figure 33. A channel operating in the Analog Local Loop-Back Mode ........................................................... 47
    4.2 T
    HE
    D
    IGITAL
    L
    OCAL
    L
    OOP
    -B
    ACK
    M
    ODE
    . ......................................................................................... 48
    III

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