XRT91L33
REV. V1.0.0
STS-12/STS-3 MULTIRATE CLOCK AND DATA RECOVERY UNIT
L
EVEL
LVPECL
T
YPE
I
P
IN
15
D
ESCRIPTION
Signal detect. SIGD should be connected to the SIGD output
on the optical module. SIGD is active HIGH. When SIGD is set
HIGH, it means there is sufficient optical power. When SIGD is
LOW, this indicates an LOS condition, the RXCLKOP/N output
signal will be held to within +/- 500 ppm of the REFCK input.
Additionally, the RXDOP/N will be held in the LOW state.
Used for production testing. Set to VSS for normal operation.
Negative side of the external loop filter. The loop filter capacitor
should be connected to these pins. The capacitor value should
be 1.0
μF
+/- 10 %
Positive side of the external loop filter. The loop filter capacitor
should be connected to these pins. The capacitor value should
be 1.0
μF
+/- 10 %.
Ground pin
3.3V power supply
N
AME
SIGD
TEST
CAP-
LVTTL
Analog
I
I
16
17
CAP+
Analog
I
18
VSSA
VDDA
PWR
PWR
PWR
PWR
19
20
5