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    DSP56303VF100 参数 Datasheet PDF下载

    DSP56303VF100图片预览
    型号： DSP56303VF100
    PDF下载： 下载PDF文件 查看货源
    内容描述： 24位数字信号处理器 [24-Bit Digital Signal Processor]
    分类和应用： 外围集成电路数字信号处理器时钟
    文件页数/大小： 108 页 / 1380 K
    品牌： FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
     浏览型号DSP56303VF100的Datasheet PDF文件第1页浏览型号DSP56303VF100的Datasheet PDF文件第3页浏览型号DSP56303VF100的Datasheet PDF文件第4页浏览型号DSP56303VF100的Datasheet PDF文件第5页浏览型号DSP56303VF100的Datasheet PDF文件第6页浏览型号DSP56303VF100的Datasheet PDF文件第7页浏览型号DSP56303VF100的Datasheet PDF文件第8页浏览型号DSP56303VF100的Datasheet PDF文件第9页  
    Table of Contents
    Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
    available from Freescale for import or sale in the United States prior to September 2010: DSP56303VF100, DSP56303VL100
    Data Sheet Conventions .......................................................................................................................................ii
    Features...............................................................................................................................................................iii
    Target Applications ............................................................................................................................................. iv
    Product Documentation ......................................................................................................................................iv
    Chapter 1
    Signals/Connections
    1.1
    1.2
    1.3
    1.5
    1.6
    1.7
    1.8
    1.9
    1.10
    1.11
    1.12
    Power ................................................................................................................................................................1-3
    Ground ..............................................................................................................................................................1-3
    Clock.................................................................................................................................................................1-4
    External Memory Expansion Port (Port A) ......................................................................................................1-4
    Interrupt and Mode Control ..............................................................................................................................1-7
    Host Interface (HI08)........................................................................................................................................1-8
    Enhanced Synchronous Serial Interface 0 (ESSI0) ........................................................................................1-11
    Enhanced Synchronous Serial Interface 1 (ESSI1) ........................................................................................1-12
    Serial Communication Interface (SCI) ...........................................................................................................1-14
    Timers .............................................................................................................................................................1-15
    JTAG and OnCE Interface ..............................................................................................................................1-16
    Maximum Ratings.............................................................................................................................................2-1
    Thermal Characteristics ....................................................................................................................................2-2
    DC Electrical Characteristics............................................................................................................................2-2
    AC Electrical Characteristics............................................................................................................................2-3
    TQFP Package Description...............................................................................................................................3-2
    TQFP Package Mechanical Drawing................................................................................................................3-9
    MAP-BGA Package Description ....................................................................................................................3-10
    MAP-BGA Package Mechanical Drawing .....................................................................................................3-18
    Thermal Design Considerations........................................................................................................................4-1
    Electrical Design Considerations......................................................................................................................4-2
    Power Consumption Considerations.................................................................................................................4-3
    PLL Performance Issues ...................................................................................................................................4-4
    Input (EXTAL) Jitter Requirements .................................................................................................................4-5
    Chapter 2
    Specifications
    2.1
    2.3
    2.4
    2.5
    Chapter 3
    Packaging
    3.1
    3.2
    3.3
    3.4
    Chapter 4
    Design Considerations
    4.1
    4.2
    4.3
    4.4
    4.5
    Appendix A
    Power Consumption Benchmark
    Data Sheet Conventions
    OVERBAR
    “asserted”
    “deasserted”
    Examples:
    Indicates a signal that is active when pulled low (For example, the
    RESET
    pin is active when
    low.)
    Means that a high true (active high) signal is high or that a low true (active low) signal is low
    Means that a high true (active high) signal is low or that a low true (active low) signal is high
    Signal/Symbol
    Logic State
    Voltage
    V
    IL
    /V
    OL
    V
    IH
    /V
    OH
    V
    IH
    /V
    OH
    V
    IL
    /V
    OL
    Signal State
    PIN
    True
    Asserted
    PIN
    False
    Deasserted
    PIN
    True
    Asserted
    PIN
    False
    Deasserted
    Note:
    Values for
    V
    IL
    ,
    V
    OL
    ,
    V
    IH
    , and
    V
    OH
    are defined by individual product specifications.
    DSP56303 Technical Data, Rev. 11
    ii
    Freescale Semiconductor

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