Signals/Connections
1
The DSP56303 input and output signals are organized into functional groups as shown in
diagrams the DSP56303 signals by functional group. The remainder of this chapter describes the signal pins in
each functional group.
Table 1-1.
DSP56303 Functional Signal Groupings
Number of Signals
Functional Group
TQFP
Power (V
CC
)
Ground (GND)
Clock
PLL
Address bus
Data bus
Bus control
Interrupt and mode control
Host interface (HI08)
Enhanced synchronous serial interface (ESSI)
Serial communication interface (SCI)
Timer
OnCE/JTAG Port
Notes:
1.
2.
3.
4.
5.
Port B
2
Ports C and D
3
Port E
4
Port A
1
18
19
2
3
18
24
13
5
16
12
3
3
6
MAP-BGA
18
66
2
3
18
24
13
5
16
12
3
3
6
Port A signals define the external memory interface port, including the external address bus, data bus, and control signals.
Port B signals are the HI08 port signals multiplexed with the GPIO signals.
Port C and D signals are the two ESSI port signals multiplexed with the GPIO signals.
Port E signals are the SCI port signals multiplexed with the GPIO signals.
There are 2 signal connections in the TQFP package and 7 signal connections in the MAP-BGA package that are not used.
These are designated as no connect (NC) in the package description (see
Note:
This chapter refers to a number of configuration registers used to select individual multiplexed signal
functionality. Refer to the
DSP56303 User’s Manual
for details on these configuration registers.
DSP56303 Technical Data, Rev. 11
Freescale Semiconductor
1-1
Because of an order from the United States International Trade Commission, BGA-packaged product lines and part numbers indicated here currently are not
available from Freescale for import or sale in the United States prior to September 2010: DSP56303VF100, DSP56303VL100
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
