Freescale Semiconductor, Inc.
Computer Operating Properly (COP) Module
14.4.3 COPCTL Write
Writing any value to the COP control register (COPCTL) (see 14.5 COP
Control Register) clears the COP counter and clears stages 12 through
4 of the COP prescaler. Reading the COP control register returns the
reset vector.
14.4.4 Power-On Reset
The power-on reset (POR) circuit clears the COP prescaler
4096 CGMXCLK cycles after power-up.
14.4.5 Internal Reset
An internal reset clears the COP prescaler and the COP counter.
14.4.6 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the COP prescaler.
14.4.7 COPD
14.4.8 COPL
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register. See Section 11. Configuration Register
(CONFIG-1).
The COPL signal reflects the state of the COP rate select bit (COPL) in
the configuration register. See Section 11. Configuration Register
(CONFIG-1).
Technical Data
MC68HC908AS60 — Rev. 1.0
Computer Operating Properly (COP) Module
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