Power Characteristics
Table 6. Estimated Typical I/O Power Consumption (continued)
GVDD (2.5 OVDD (3.3
LVDD (3.3
V)
LVDD (2.5
V)
Interface
Parameter
Units
Notes
V)
V)
PCI/PCI-X I/O
32-bit, 33 MHz
32-bit 66 MHz
64-bit, 66 MHz
64-bit, 133 MHz
32-bit, 33 MHz
32-bit, 66 MHz
32-bit, 133 MHz
32-bit, 167 MHz
500 MHz data rate
MII
0.04
0.07
0.14
0.25
0.07
0.13
0.24
0.30
0.96
W
2
Local Bus I/O
W
3
RapidIO I/O
TSEC I/O
W
4
10
70
mW
5, 6
GMII, TBI (2.5 V)
GMII, TBI (3.3 V)
RGMII, RTBI
MII
40
40
FEC I/O
10
mW
7
Notes:
1. GVDD=2.5, ECC enabled, 66% bus utilization, 33% write cycles, 10pF load on data, 10pF load on address/command, 10pF
load on clock
2. OVDD=3.3, 30pF load per pin, 54% bus utilization, 33% write cycles
3. OVDD=3.3, 25pF load per pin, 5pF load on clock, 40% bus utilization, 33% write cycles
4. VDD=1.2, OVDD=3.3
5. LVDD=2.5/3.3, 15pF load per pin, 25% bus utilization
6. Power dissipation for one TSEC only
7. OVDD=3.3, 20pF load per pin, 25% bus utilization
MPC8540 Integrated Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
13
FREESCALE [ Freescale ]
