CPM Electrical Characteristics
11.12 I
2
C AC Electrical Specifications
provides the I
2
C (SCL < 100 kHz) timings.
Table 26. I
2
C Timing (SCL < 100 kH
Z
)
All Frequencies
Num
200
200
202
203
204
205
206
207
208
209
210
211
1
Characteristic
Min
SCL clock frequency (slave)
SCL clock frequency (master)
1
Bus free time between transmissions
Low period of SCL
High period of SCL
Start condition setup time
Start condition hold time
Data hold time
Data setup time
SDL/SCL rise time
SDL/SCL fall time
Stop condition setup time
0
1.5
4.7
4.7
4.0
4.7
4.0
0
250
—
—
4.7
Max
100
100
—
—
—
—
—
—
—
1
300
—
Unit
kHz
kHz
μs
μs
μs
μs
μs
μs
ns
μs
ns
μs
SCL frequency is given by SCL = BRGCLK_frequency / ((BRG register + 3
×
pre_scaler
×
2).
The ratio SYNCCLK/(BRGCLK/pre_scaler) must be greater than or equal to 4/1.
provides the I
2
C (SCL > 100 kHz) timings.
Table 27. . I
2
C Timing (SCL > 100 kH
Z
)
All Frequencies
Num
200
200
202
203
204
205
206
207
208
209
210
211
1
Characteristic
SCL clock frequency (slave)
SCL clock frequency (master)
1
Bus free time between transmissions
Low period of SCL
High period of SCL
Start condition setup time
Start condition hold time
Data hold time
Data setup time
SDL/SCL rise time
SDL/SCL fall time
Stop condition setup time
Expression
Min
fSCL
fSCL
0
BRGCLK/16512
1/(2.2 * fSCL)
1/(2.2 * fSCL)
1/(2.2 * fSCL)
1/(2.2 * fSCL)
1/(2.2 * fSCL)
0
1/(40 * fSCL)
—
—
1/2(2.2 * fSCL)
Max
BRGCLK/48
BRGCLK/48
—
—
—
—
—
—
—
1/(10 * fSCL)
1/(33 * fSCL)
—
Unit
Hz
Hz
s
s
s
s
s
s
s
s
s
s
SCL frequency is given by SCL = BRGCLK_frequency / ((BRG register + 3)
×
pre_scaler
×
2).
The ratio SYNCCLK/(BRGCLK / pre_scaler) must be greater than or equal to 4/1.
MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8
64
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
