Document Revision History
15 Document Revision History
lists significant changes between revisions of this hardware specification.
Table 35. Document Revision History
Revision
5.1
6
6.1
Date
11/2001
10/2002
11/2002
Changes
• Revised template format, removed references to MAC functionality, changed
B23 max value @ 66 MHz from 2ns to 8ns, added this revision history table
• Added the MPC855T. Corrected
• Corrected UTOPIA RXenb* and TXenb* timing values
• Changed incorrect usage of Vcc to Vdd
• Corrected dual port RAM to 8 Kbytes
• Changed B28a through B28d and B29d to show that TRLX can be 0 or 1
• Changed reference documentation to reflect the Rev 2 MPC860 PowerQUICC Family
Users Manual
• Nontechnical reformatting
• •Added Section 11.2 on the Port C interrupt pins
• •Nontechnical reformatting
• Added a tablefootnote to
DC Electrical Specifications about meeting the VIL
Max of the I2C Standard
• Replaced the thermal characteristics in
by the ZQ package
• Add the new parts to the Ordering and Availablity Chart in
• Added the mechanical spec of the ZQ package in
• Removed all of the old revisions from
• Updated template.
• On page 1, added a second paragraph.
• After Table 2, inserted a new figure showing the undershoot/overshoot voltage
and renumbered the rest of the figures.
• In
changed all reference voltage measurement points from 0.2 and 0.8 V to
50% level.
• In
changed num 46 description to read, “TA assertion to rising edge ...”
• In
changed TA to reflect the rising edge of the clock.
6.2
8/2003
6.3
7.0
9/2003
9/2004
8
08/2007
MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8
76
Freescale Semiconductor
FREESCALE [ FREESCALE SEMICONDUCTOR, INC ]
