MB90350 Series
(Continued)
•
Timer
• Time-base timer, clock timer, watchdog timer : 1 channel
• 8/16-bit PPG timer : 8-bit
×
10 channels, or 16-bit
×
6 channels
• 16-bit reload timer : 4 channels
• 16- bit input/output timer
- 16-bit free run timer : 2 channels (FRT0 : ICU0/1, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7)
- 16- bit input capture: (ICU) : 6 channels
- 16-bit output compare : (OCU) : 4 channels
•
Full-CAN interface : 1 channel
• Compliant with Ver2.0A and Ver2.0B CAN specifications
• Flexible message buffering (mailbox and FIFO buffering can be mixed)
• CAN wake-up function
•
UART (LIN/SCI) : 2 channels
• Equipped with full-duplex double buffer
• Clock-asynchronous or clock-synchronous serial transmission is available
•
I
2
C interface* : 1 channel
• Up to 400 Kbit/s transfer rate
•
DTP/External interrupt : 8 channels, CAN wakeup : 1 channel
• Module for activation of extended intelligent I/O service (EI
2
OS), DMA, and generation of external interrupt.
•
Delay interrupt generator module
• Generates interrupt request for task switching.
•
8/10-bit A/D converter : 15 channels
• Resolution is selectable between 8-bit and 10-bit.
• Activation by external trigger input is allowed.
• Conversion time : 3
µs
(at 24-MHz machine clock, including sampling time)
•
Program patch function
• Address matching detection for 6 address pointers.
•
Internal voltage regulator
• Supports 3 V MCU core, offering low EMI and low power consumption figures
•
Programmable input levels
• Automotive/CMOS-Schmitt (initial level is Automotive in Single chip mode)
• TTL level (initial level for External bus mode)
•
Flash security function
• Protects the content of Flash (Flash device only)
* : I
2
C license :
Purchase of Fujitsu I
2
C components conveys a license under the Philips I
2
C Patent Rights to use, these com-
ponents in an I
2
C system provided that the system conforms to the I
2
C Standard Specification as defined by
Philips.
3