ISSUED DATE :2006/06/14
REVISED DATE :
Figure 9. Byte Write
*
Figure 10. Page Write
*
(
*
= DON’T CARE bit for 1K)
Write Operations
Byte/Page Write:
If a write operation is entered (R/W=0) and an acknowledgment is sent, then the next sequence requires an
8-bit data word address. After an acknowledgment is received from this word address, the 1
st
byte of data can
be loaded. The device will send an acknowledgment after each byte to confirm the transmission.
To being the write cycle, a STOP condition must be issued (refer to Figure 9). Both byte and page write
operations are supported, so the STOP condition can be issued after the 1
st
byte or the last byte in the page.
When the STOP condition occurs, an internal time is started, all input are disabled, and the EEPROM will not
respond to any more commands until the write cycle is completed.
Note: The number of bytes in a page depends on the density used. If 1K density is used, then the page size is
8 bytes. In contrast, if the 16K density is used, then the page size is 16 bites. Refer to the Memory
Organization section for more details.
The internal page counter is incremented after each byte received, but the row location of the memory page
will always remain the same. Therefore, the device will wrap around to the 1
st
byte in the page after the last
byte in the page is received. Any further data loaded into the page buffer will overwrite the previous data
loaded.
Acknowledge Polling:
After the STOP condition is issued, the write cycle begins. Acknowledge polling can be
initiated by sending a START condition followed by the device address word. If the EEPROM has completed
the internal write cycle and returned to standby mode, the device will respond by sending back an
acknowledgment by pulling the SDA pin low. Otherwise, the sequence will be ignored and no acknowledgment
will be sent.
Read Operations
There are three types of read operations: current address read, random address read, and sequence read. A
random address read can be considered a current address read operation with an additional sequence in the
beginning to load a different address into the internal counter. A sequential read occurs when subsequent
bytes are clocked out after a current address read or random address read occurs.
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