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HMNR328DV-85I 参数 Datasheet PDF下载

HMNR328DV-85I图片预览
型号: HMNR328DV-85I
PDF下载: 下载PDF文件 查看货源
内容描述: 5.0或3.3V , 256K位( 32千位×8 ) TIMEKEEPER NVSRAM [5.0 or 3.3V, 256K bit (32 Kbit x 8) TIMEKEEPER NVSRAM]
分类和应用: 静态存储器
文件页数/大小: 13 页 / 302 K
品牌: HANBIT [ HANBIT ELECTRONICS CO.,LTD ]
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HANBit
WRITE Mode AC Characteristics
HMNR328D
Symbol
Parameter
(1)
HMNR328D(V)
HMNR328D
-100
Min
100
0
0
80
80
10
10
50
50
5
5
Max
HMNR328DV
-85
Min
85
0
0
55
60
0
0
30
30
0
0
Max
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
25
65
65
5
nS
nS
nS
nS
Unit
-70
Min
Max
70
0
0
50
55
0
0
30
30
5
5
25
60
60
5
80
80
5
t
AVAV
t
AVWL
t
AVEL
t
WLWH
t
ELEH
t
WHAX
t
EHAX
t
DVWH
t
DVEH
t
WHDX
t
EHDX
t
WLQZ
(2,3)
WRITE Cycle Time
Address Valid to WRITE Enable Low
Address Valid to Chip Enable Low
WRITE Enable Pulse Width
Chip Enable Low to Chip Enable High
WRITE Enable High to Address Transition
Chip Enable High to Address Transition
Input Valid to WRITE Enable High
Input Valid to Chip Enable High
WRITE Enable High to Input Transition
Chip Enable High to Input Transition
WRITE Enable Low to Output High-Z
Address Valid to WRITE Enable High
Address Valid to Chip Enable High
WRITE Enable High to Output Transition
50
t
AVWH
t
AVEH
t
WHQX
(2,3)
Note
: 1. Valid for Ambient Operating Temperature: TA = 0 to 70° C; VCC = 4.5 to 5.5V or 3.0 to 3.6V (except where
noted).
2. CL = 5pF.
3. If /CE goes low simultaneously with /WE going low, the outputs remain in the high impedance state.
Data Retention Mode
With valid V
CC
applied, the HMNR328D(V) operates as a conventional Bytewide static RAM. Should the supply voltage
decay, the RAM will automatically deselect, write protecting itself when V
CC
falls between V
PFD
(max), V
PFD
(min) window.
All outputs become high impedance and all inputs are treated as
Don't care.”
Note : A power failure during a WRITE cycle may corrupt data at the current addressed location, but does not jeopardize
the rest of the RAM's content. At voltages below V
PFD
(min), the memory will be in a write protected state, provided the V
CC
fall time is not less than t
F
. The HMNR328D(V) may respond to transient noise spikes on V
CC
that cross into the deselect
window during the time the device is sampling V
CC
. Therefore, decoupling of the power supply lines is recommended.
When V
CC
drops below V
SO
, the control circuit switches power to the internal battery, preserving data and powering the
clock. The internal energy source will maintain data in the HMNR328D(V) for an accumulated period of at least 10 years
at room temperature. As system power rises above V
SO
, the battery is disconnected, and the power supply is switched to
external V
CC
. Write protection continues until V
CC
reaches V
PFD
(min) plus t
REC
(min). Normal RAM operation can resume
t
REC
after V
CC
exceeds V
PFD
(max).
URL : www.hbe.co.kr
Rev. 0.0 (January, 2002)
8
HANBit Electronics Co.,Ltd.