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HT48R0AA-1 参数 Datasheet PDF下载

HT48R0AA-1图片预览
型号: HT48R0AA-1
PDF下载: 下载PDF文件 查看货源
内容描述: 高性价比的I / O型8位OTP MCU [Cost-Effective I/O Type 8-Bit OTP MCU]
分类和应用:
文件页数/大小: 40 页 / 258 K
品牌: HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
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HT48R0AA-1
At a subroutine call or interrupt acknowledge signal, the
contents of the program counter are pushed onto the
stack. At the end of a subroutine or an interrupt routine,
signaled by a return instruction (RET or RETI), the pro-
gram counter is restored to its previous value from the
stack. After a chip reset, the Stack Pointer will point to
the top of the stack.
If the stack is full and a non-masked interrupt takes
place, the interrupt request flag will be recorded but the
acknowledge signal will be inhibited. When the stack
pointer is decremented (by RET or RETI), the interrupt
will be serviced. This feature prevents stack overflow al-
lowing the programmer to use the structure more easily.
In a similar case, if the stack is full and a
²CALL²
is sub-
sequently executed, stack overflow occurs and the first
entry will be lost (only the most recent 4 return ad-
dresses are stored).
Data Memory
-
RAM
The data memory has a capacity of 149´8 bits and is
divided into two functional groups: special function reg-
isters and general purpose data memory (128´8). Most
are read/write, but some are read only. The unused
space before the 20H is reserved for future expanded
usage and reading these locations will return the result
²00H².
The general purpose data memory, addressed
from 20H to 9FH, is used for data and control informa-
tion under instruction commands.
All of the data memory areas can handle arithmetic,
logic, increment, decrement and rotate operations di-
rectly. Except for some dedicated bits, each bit in the
data memory can be set and reset by
²SET
[m].i² and
²CLR
[m].i². They are also indirectly accessible through
memory pointer register (MP).
Indirect Addressing Register
Location 00H is an indirect addressing register that is
not physically implemented. Any read/write operation to
[00H] access the data memory pointed to by MP. Read-
ing location 00H itself indirectly will return the result
00H. Writing indirectly results in no operation.
The memory pointer register (MP) is an 8-bit register
used to access the RAM by combining corresponding
indirect addressing register.
Accumulator
The accumulator is closely related to ALU operations. It
is also mapped to location 05H of the data memory and
can carry out immediate data operations. The data
movement between two data memory locations must
pass through the accumulator.
0 0 H
0 1 H
0 2 H
0 3 H
0 4 H
0 5 H
0 6 H
0 7 H
0 8 H
0 9 H
0 A H
0 B H
0 C H
0 D H
0 E H
0 F H
1 0 H
1 1 H
1 2 H
1 3 H
1 4 H
1 5 H
1 6 H
1 7 H
1 8 H
1 9 H
1 A H
1 F H
2 0 H
G e n e ra l P u rp o s e
D a ta M e m o ry
(1 2 8 B y te s )
9 F H
: U n u s e d
R e a d a s "0 0 "
T M R 1
T M R 1 C
P A
P A C
P B
P B C
P C
P C C
P D
P D C
T M R 0
T M R 0 C
A C C
P C L
T B L P
T B L H
W D T S
S T A T U S
IN T C
S p e c ia l P u r p o s e
D a ta M e m o ry
In d ir e c t A d d r e s s in g R e g is te r
M P
RAM Mapping
Arithmetic and Logic Unit
-
ALU
This circuit performs 8-bit arithmetic and logic operations.
The ALU provides the following functions:
·
Arithmetic operations (ADD, ADC, SUB, SBC, DAA)
·
Logic operations (AND, OR, XOR, CPL)
·
Rotation (RL, RR, RLC, RRC)
·
Increment and Decrement (INC, DEC)
·
Branch decision (SZ, SNZ, SIZ, SDZ ....)
The ALU not only saves the results of a data operation but
also changes the status register.
Status Register
-
STATUS
This 8-bit register (0AH) contains the zero flag (Z), carry
flag (C), auxiliary carry flag (AC), overflow flag (OV),
power down flag (PDF), and watchdog time-out flag
(TO). It also records the status information and controls
the operation sequence.
Rev. 1.10
8
July 27, 2007