HT48R10A-1/HT48C10-1
Block Diagram
IN T /P C 0
In te rru p t
C ir c u it
S T A C K
P ro g ra m
R O M
P ro g ra m
C o u n te r
IN T C
T M R C
T M R
M
U
P r e s c a le r
X
T M R /P C 1
P C 1
E N /D IS
f
S
M
U
X
Y S
M
U
f
S
X
Y S
P C 0
In s tr u c tio n
R e g is te r
M
U
X
/4
M P
D A T A
M e m o ry
W D T S
W D T P r e s c a le r
W D T
R T C
O S C
In s tr u c tio n
D e c o d e r
A L U
T im in g
G e n e ra to r
M U X
P C 3
P C 4
P C C
P C
P O R T C
W D T O S C
P C 0 ~ P C 4
B Z /B Z
S T A T U S
P B C
P B
P O R T B
P B 0 ~ P B 7
S h ifte r
P A C
O S C 2 /
P C 4
O S
P
R
V
V
C 1 /
C 3
E S
D D
S S
P O R T A
A C C
In te rn a l
R C O S C
P A
P A 0 ~ P A 7
Pin Assignment
P B 5
P B 4
P A 3
P A 2
P A 1
P A 0
P B 3
P B 2
P B 1 /B Z
P B 0 /B Z
V S S
P C 0 /IN T
9
1 0
1 1
1 2
8
7
6
5
4
3
2
1
2 4
2 3
2 2
2 1
2 0
1 9
1 8
1 7
1 6
1 5
1 4
1 3
P B 6
P B 7
P A 4
P A 5
P A 6
P A 7
O S C 2 /P C 4
O S C 1 /P C 3
V D D
R E S
P C 2
P C 1 /T M R
H T 4 8 R 1 0 A -1 /H T 4 8 C 1 0 -1
2 4 S K D IP -A /S O P -A
Rev. 1.90
2
November 4, 2005
HOLTEK [ HOLTEK SEMICONDUCTOR INC ]
