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GM76V256CLLET-10 参数 Datasheet PDF下载

GM76V256CLLET-10图片预览
型号: GM76V256CLLET-10
PDF下载: 下载PDF文件 查看货源
内容描述: [Standard SRAM, 32KX8, 100ns, CMOS, PDSO28, 8 X 13.40 MM, TSOP1-28]
分类和应用: 静态存储器光电二极管内存集成电路
文件页数/大小: 10 页 / 136 K
品牌: HYNIX [ HYNIX SEMICONDUCTOR ]
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GM76V256C Series
DC CHARACTERISTICS
Vcc = 3.3V
±10%,
T
A
= 0¡
É
70¡
É
Normal)/-25°C to 85°C (Extended), unless otherwise specified.
to
(
Symbol
Parameter
Test Condition
Min. Typ. Max.
I
LI
Input Leakage Current
Vss < V
IN
< Vcc
-1
-
1
I
LO
Output Leakage Current
Vss < V
OUT
< Vcc, /CS = V
IH
or
-1
-
1
/
OE
=
V
IH
or /WE = V
IL
Icc
Operating Power Supply
/CS = V
IL
,
-
-
2
Current
V
IN
= V
IH
or V
IL,
I
I/O =
0mA
I
CC1
Average Operating Current
/CS = V
IL, Vin = Vih or Vil
-
-
35
Min. Duty Cycle = 100%, I
I/O =
0mA
I
CC2
Average Operating Current
/CS = V
IL, Vin = Vih or Vil
-
-
5
Cycle = 1us , I
I/O =
0mA
I
SB
TTL Standby Current
/CS= V
IH
-
-
0.5
(TTL Inputs)
I
SB1
CMOS Standby Current
/CS > Vcc - 0.2V
L
-
-
20
(CMOS Inputs)
LL
-
-
10
LE
-
-
30
LLE
-
-
15
V
OL
Output Low Voltage
I
OL
= 2.1mA
-
-
0.4
V
OH
Output High Voltage
I
OH =
-1.0mA
2.4
-
-
Note : Typical values are at Vcc =3.3V, T
A
= 25°C
Unit
uA
uA
mA
mA
mA
mA
uA
uA
uA
uA
V
V
AC CHARACTERISTICS(I)
Vcc = 3.3V
±10%,
T
A
= 0°C to 70°C (Normal) / -25¡
É
85¡
É
to
(Extended) unless otherwise specified.
-85
-10
Unit
# Symbol
Parameter
Min.
Max. Min
Max.
READ CYCLE
1
tRC
Read Cycle Time
85
-
100
-
ns
2
tAA
Address Access Time
-
85
-
100
ns
3
tACS
Chip Select Access Time
-
85
-
100
ns
4
tOE
Output Enable to Output Valid
-
45
-
50
ns
5
tCLZ
Chip Select to Output in Low Z
10
-
10
-
ns
6
tOLZ
Output Enable to Output in Low Z
5
-
5
-
ns
7
tCHZ
Chip Disable to Output in High Z
0
30
0
35
ns
8
tOHZ
Out Disable to Output in High Z
0
30
0
35
ns
9
tOH
Output Hold from Address Change
10
-
15
-
ns
WRITE CYCLE
10 tWC
Write Cycle Time
85
-
100
-
ns
11 tCW
Chip Selection to End of Write
75
-
80
-
ns
12 tAW
Address Valid to End of Write
70
-
80
-
ns
13 tAS
Address Set-up Time
0
-
0
-
ns
14 tWP
Write Pulse Width
60
-
70
-
ns
15 tWR
Write Recovery Time
0
-
0
-
ns
16 tWHZ
Write to Output in High Z
0
30
0
30
ns
17 tDW
Data to Write Time Overlap
35
-
40
-
ns
18 tDH
Data Hold from Write Time
0
-
0
-
ns
19 tOW
Output Active from End of Write
5
-
10
-
ns
Rev 00 / Jul. 2000
3