X24165
WEL and RWEL are volatile latches that power-up in the
LOW (disabled) state. A write to any address other
than 7FFh, where the Write Protect Register is located,
will be ignored (no ack) until the WEL bit is set
HIGH. The WEL bit is set by writing 0000001x to
address 7FFh. Once set, WEL remains HIGH until
either reset (by writing 00000000 to 7FFh) or until the part
powers-up again. The RWEL bit controls writes to
the block protect bits. RWEL is set by first setting WEL = 1
and then writing 0000011x to address 7FFh.
RWEL must be set in order to change the block protect bits,
BP0 and BP1, or the WPEN bit. RWEL is reset
WRITE PROTECT REGISTER
The Write Protect Register (WPR) is located at the
highest address, 7FFh.
Figure 11. Write Protect Register
WPR (Addr = 7FFh)
7
WPEN
6
0
5
0
4
BP1
3
BP0
2
RWEL
1
WEL
0
0
6551 ILL F15.1
WPR.1 = WEL –
Write Enable Latch (Volatile)
0 = Write enable latch reset, writes disabled 1 =
Write enable latch set, writes enabled
when the block protect or WPEN bits are changed, or
when the part powers-up again.
Programming the BP or WPEN Bits
A three step sequence is required to change the
non-volatile Block Protect or Write Protect Enable:
1) Set WEL = 1 (write 00000010 to address 7FFh,
volatile write cycle)
If WEL = 0 then “no A
CK” after first byte of input data.
WPR.2 = RWEL –
Register Write Enable Latch (Volatile)
0 = Register write enable latch reset, writes
disabled
1 = Register write enable latch set, writes enabled
WPR.3, WPR.4 = BP0, BP1 –
(Start)
2) Set RWEL = 1 (write 00000110 to address 7FFh,
volatile write cycle)
Block Protect Bits (Nonvolatile)
Block Protect section for definition)
WPR.7 = WPEN –
(See
(Start)
3) Set BP1, BP0, and/or WPEN bits (Write w00yz010 to
address 7FFh)
Write Protect Enable Bit (Nonvolatile)
(See Hardware Write Protect section for definition)
Writing to the Write Protect Register
The Write Protect Register is written by performing a
random write of one byte directly to address, 7FFh. If a
page write is performed starting with any address other
than 7FFh, the byte in the array at address 7FFh
will be written instead of the Write Protect Register
(assuming writes are not disabled by the block protect
w = WPEN, y = BP1, Z = BP0,
(Stop)
Step 3 is a nonvolatile write cycle, requiring 10ms to complete.
RWEL is reset (0) by this write cycle,
requiring another write cycle to set RWEL again before the
block protect bits can be changed. RWEL must be
0 in step 3; if w00yz110 is written to address 7FFh,
RWEL is set but WPEN, BP1 and BP0 are not
register).
The state of the Write Protect Register can be read by
performing a random read at address 7FFh at any
changed (the device remains at step 2).
time. If a sequential read starting at any other address than
7FFh is performed, the contents of the byte in the
array at 7FFh is read out instead of the Write Protect
Register.
9
ICMIC [ IC MICROSYSTEMS ]
