X24C01
The X24C01 will respond with an acknowledge after
recognition of a start condition, a seven bit word address
Stop Condition
All communications must be terminated by a stop con-
dition, which is a LOW to HIGH transition of SDA when
and a R/W bit. If a write operation has been selected, the
X24C01 will respond with an acknowledge after each
byte of data is received.
SCL is HIGH. The stop condition is also used by the
X24C01 to place the device in the standby power mode
after a read sequence. A stop condition can only be
issued after the transmitting device has released the bus.
In the read mode the X24C01 will transmit eight bits of data,
release the SDA line and monitor the line for an
acknowledge. If an acknowledge is detected and no
stop condition is generated by the master, the X24C01
Acknowledge
Acknowledge is a software convention used to indicate
successful data transfers. The transmitting device will
will continue to transmit data. If an acknowledge is not
detected, the X24C01 will terminate further data trans-
release the bus after transmitting eight bits. During the ninth
clock cycle the receiver will pull the SDA line LOW
missions. The master must then issue a stop condition to
return the X24C01 to the standby power mode and
to acknowledge that it received the eight bits of data.
Refer to Figure 3.
place the device into a known state.
Figure 2. Definition of Start and Stop
SCL
SDA
START CONDITION
STOP CONDITION
3837 FHD F07
Figure 3. Acknowledge Response From Receiver
SCL FROM
MASTER
1
8
9
DATA
OUTPUT
FROM
TRANSMITTER
DATA
OUTPUT
FROM
RECEIVER
START
ACKNOWLEDGE
3837 FHD F08
4
ICMIC [ IC MICROSYSTEMS ]
